loadpatents
name:-0.0048911571502686
name:-0.011932134628296
name:-0.00044488906860352
Treichler; Sean Jeffrey Patent Filings

Treichler; Sean Jeffrey

Patent Applications and Registrations

Patent applications and USPTO patent grants for Treichler; Sean Jeffrey.The latest application filed is for "system, method, and computer program product for copying data between memory locations".

Company Profile
0.17.6
  • Treichler; Sean Jeffrey - Sunnyvale CA
  • Treichler; Sean Jeffrey - Mountain View CA US
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
System, method, and computer program product for copying data between memory locations
Grant 9,164,690 - Khailany , et al. October 20, 2
2015-10-20
Memory clock slowdown
Grant 8,707,081 - Alben , et al. April 22, 2
2014-04-22
System, Method, And Computer Program Product For Copying Data Between Memory Locations
App 20140032828 - Khailany; Brucek Kurdo ;   et al.
2014-01-30
Memory device synchronization
Grant 8,495,327 - Treichler , et al. July 23, 2
2013-07-23
Virtual binning
Grant 8,249,819 - Treichler , et al. August 21, 2
2012-08-21
Hierarchical processor array
Grant 8,237,705 - Lindholm , et al. August 7, 2
2012-08-07
Hierarchical Processor Array
App 20120026175 - Lindholm; John Erik ;   et al.
2012-02-02
Hierarchical processor array
Grant 8,077,174 - Lindholm , et al. December 13, 2
2011-12-13
Memory Device Synchronization
App 20110302385 - Treichler; Sean Jeffrey ;   et al.
2011-12-08
Memory Clock Slowdown
App 20110191615 - Alben; Jonah M. ;   et al.
2011-08-04
Memory clock slowdown
Grant 7,836,318 - Alben , et al. November 16, 2
2010-11-16
Method and apparatus for display of data
Grant 7,746,349 - Rao , et al. June 29, 2
2010-06-29
Memory address and datapath multiplexing
Grant 7,584,321 - Malachowsky , et al. September 1, 2
2009-09-01
Hierarchical Processor Array
App 20080143730 - Lindholm; John Erik ;   et al.
2008-06-19
System, apparatus and method for reclaiming memory holes in memory composed of identically-sized memory devices
Grant 7,287,145 - Simeral , et al. October 23, 2
2007-10-23
System, apparatus and method for avoiding page conflicts by characterizing addresses in parallel with translations of memory addresses
Grant 7,275,143 - Simeral , et al. September 25, 2
2007-09-25
System, apparatus and method for reclaiming memory holes in memory composed of arbitrarily-sized memory devices
Grant 7,240,179 - Treichler , et al. July 3, 2
2007-07-03
Memory clock slowdown
Grant 7,187,220 - Alben , et al. March 6, 2
2007-03-06
Memory clock slowdown synthesis circuit
Grant 7,042,263 - Johnson , et al. May 9, 2
2006-05-09

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.

© 2024 USPTO.report | Privacy Policy | Resources | RSS Feed of Trademarks | Trademark Filings Twitter Feed