Tran; Giap H.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Tran; Giap H..The latest application filed is for "methods for configuring fpga ' s having viriable grain components for providing time-shared access to interconnect resources".

Company Profile

0.14.3

Tran; Giap H. - San Jose CA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Variable grain architecture for FPGA integrated circuits Grant 6,621,298 - Agrawal , et al. September 16, 2	2003-09-16
Methods for configuring FPGA's having variable grain components for providing time-shared access to interconnect resources Grant 6,590,415 - Agrawal , et al. July 8, 2	2003-07-08
Methods for configuring FPGA's having variable grain blocks and shared logic for providing symmetric routing of result output to differently-directed and tristateable interconnect resources Grant 6,526,558 - Agrawal , et al. February 25, 2	2003-02-25
Methods for configuring FPGA ' S having viriable grain components for providing time-shared access to interconnect resources App 20020196809 - Agrawal, Om P. ; et al.	2002-12-26
Variable grain architecture for FPGA integrated circuits App 20020186044 - Agrawal, Om P. ; et al.	2002-12-12
Variable grain architecture for FPGA integrated circuits Grant 6,380,759 - Agrawal , et al. April 30, 2	2002-04-30
Methods for configuring FPGA's having variable grain blocks and shared logic for providing symmetric routing of result output to differently-directed and tristateable interconnect resources App 20010056570 - Agrawal, Om P. ; et al.	2001-12-27
Symmetrical, extended and fast direct connections between variable grain blocks in FPGA integrated circuits Grant 6,275,064 - Agrawal , et al. August 14, 2	2001-08-14
Methods for configuring FPGA's having variable grain components for providing time-shared access to interconnect resources Grant 6,249,144 - Agrawal , et al. June 19, 2	2001-06-19
FPGA device and method that includes a variable grain function architecture for implementing configuration logic blocks and a complimentary variable length interconnect architecture for providing configurable routing between configuration logic blocks Grant 6,216,257 - Agrawal , et al. April 10, 2	2001-04-10
Tileable and compact layout for super variable grain blocks within FPGA device Grant 6,154,051 - Nguyen , et al. November 28, 2	2000-11-28
Methods for configuring FPGA's having variable grain components for providing time-shared access to interconnect resources Grant 6,124,730 - Agrawal , et al. September 26, 2	2000-09-26
Programmable control multiplexing for input/output blocks (IOBs) in FPGA integrated circuits Grant 6,107,823 - Agrawal , et al. August 22, 2	2000-08-22
Methods for configuring FPGA's having variable grain blocks and logic for providing time-shared access to interconnect resources Grant 6,100,715 - Agrawal , et al. August 8, 2	2000-08-08
Variable grain architecture for FPGA integrated circuits Grant 6,097,212 - Agrawal , et al. August 1, 2	2000-08-01
Flexible direct connections between input/output blocks (IOBs) and variable grain blocks (VGBs) in FPGA integrated circuits Grant 5,990,702 - Agrawal , et al. November 23, 1	1999-11-23
Input/output block (IOB) connections to MaxL lines, nor lines and dendrites in FPGA integrated circuits Grant 5,982,193 - Agrawal , et al. November 9, 1	1999-11-09

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