Tosaya; Eric S.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Tosaya; Eric S..The latest application filed is for "use of underfill tape in microelectronic components, and microelectronic components with cavities coupled to through-substrate vias".

Company Profile

0.7.4

Tosaya; Eric S. - Fremont CA
Tosaya; Eric S. - San Jose CA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Use of underfill tape in microelectronic components, and microelectronic components with cavities coupled to through-substrate vias Grant 9,496,154 - Tosaya , et al. November 15, 2	2016-11-15
Use Of Underfill Tape In Microelectronic Components, And Microelectronic Components With Cavities Coupled To Through-substrate Vias App 20160079093 - TOSAYA; Eric S. ; et al.	2016-03-17
Holding Of Interposers And Other Microelectronic Workpieces In Position During Assembly And Other Processing App 20150333049 - Woychik; Charles G. ; et al.	2015-11-19
Stiffener Frame With Circuit Board Corner Protection App 20130258619 - Ley; Tom J. ; et al.	2013-10-03
Heat spreader having holes for rivet-like adhesive connections Grant 6,538,320 - Tosaya , et al. March 25, 2	2003-03-25
Heat sink grounded to a grounded package lid Grant 6,512,675 - Tarter , et al. January 28, 2	2003-01-28
Extruded heat spreader Grant 6,483,169 - Tosaya , et al. November 19, 2	2002-11-19
Multilayer IC semiconductor package Grant 5,414,222 - Sen , et al. May 9, 1	1995-05-09
Multilayer IC semiconductor package Grant 5,304,743 - Sen , et al. April 19, 1	1994-04-19
Process of attaching a die to a substrate using gold/silicon seed Grant 4,771,018 - Bhattacharyya , et al. September 13, 1	1988-09-13

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