Torrisi; Davide

Patent Applications and Registrations

Patent applications and USPTO patent grants for Torrisi; Davide.The latest application filed is for "method for programming of memory cells, in particular of the flash type, and corresponding programming architecture".

Company Profile

0.7.7

Torrisi; Davide - Acireale IT
Torrisi; Davide - Acireale CT
Torrisi; Davide - I-95024 - Acireale CT
Torrisi; Davide - Adireale IT

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Method for programming of memory cells, in particular of the flash type, and corresponding programming architecture Grant 7,944,751 - Torrisi , et al. May 17, 2	2011-05-17
Method for Programming of Memory Cells, in Particular of the Flash Type, and Corresponding Programming Architecture App 20100002521 - Torrisi; Davide ; et al.	2010-01-07
Method for programming of memory cells, in particular of the flash type, and corresponding programming architecture Grant 7,606,078 - Torrisi , et al. October 20, 2	2009-10-20
Circuit for selecting/deselecting a bitline of a non-volatile memory Grant 7,254,062 - Martines , et al. August 7, 2	2007-08-07
Method for programming of memory cells, in particular of the flash type, and corresponding programming architecture App 20070147130 - Torrisi; Davide ; et al.	2007-06-28
Method and circuit for verifying and eventually substituting defective reference cells of a memory Grant 7,177,217 - Martines , et al. February 13, 2	2007-02-13
Gate voltage regulation system for a non-volatile memory cells programming and/or soft programming phase Grant 7,085,163 - Martines , et al. August 1, 2	2006-08-01
Circuit for selecting/deselecting a bitline of a non-volatile memory App 20050249022 - Martines, Ignazio ; et al.	2005-11-10
Method and circuit for verifying and eventually substituting defective reference cells of a memory App 20050248982 - Martines, Ignazio ; et al.	2005-11-10
Gate voltage regulation system for a non volatile memory cells programming and/or soft programming phase App 20040233722 - Martines, Ignazio ; et al.	2004-11-25
Low-noise output buffer Grant 6,737,886 - Curatolo , et al. May 18, 2	2004-05-18
Negative charge pump architecture with self-generated boosted phases Grant 6,720,822 - Torrisi , et al. April 13, 2	2004-04-13
Low-noise output buffer App 20030080781 - Curatolo, Giacomo ; et al.	2003-05-01
Negative charge pump architecture with self-generated boosted phases App 20030080804 - Torrisi, Davide ; et al.	2003-05-01

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