loadpatents
Patent applications and USPTO patent grants for Tonnel; Eugene.The latest application filed is for "power mos transistor structure".
Patent | Date |
---|---|
Power MOS transistor structure Grant 4,890,142 - Tonnel , et al. December 26, 1 | 1989-12-26 |
Semiconductor device with deep grip accessible via the surface and process for manufacturing same Grant 4,520,552 - Arnould , et al. June 4, 1 | 1985-06-04 |
Method for the formation of polycrystalline silicon layers, and its application in the manufacture of a self-aligned, non planar, MOS transistor Grant 4,420,379 - Tonnel December 13, 1 | 1983-12-13 |
Process for producing a field-effect transistor Grant 4,375,717 - Tonnel March 8, 1 | 1983-03-08 |
Process for aligning diffusion masks with respect to isolating walls of coffers in integrated circuits Grant 4,369,561 - Tonnel January 25, 1 | 1983-01-25 |
Tetrode transistor memory logic cell Grant 4,143,421 - Tonnel , et al. March 6, 1 | 1979-03-06 |
uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.
While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.
All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.