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name:-0.012494087219238
name:-0.013088941574097
name:-0.00062179565429688
Tong; Wei Hua Patent Filings

Tong; Wei Hua

Patent Applications and Registrations

Patent applications and USPTO patent grants for Tong; Wei Hua.The latest application filed is for "methods for fabricating semiconductor structure with condensed silicon germanium layer".

Company Profile
0.10.10
  • Tong; Wei Hua - Mechanicville NY
  • Tong; Wei Hua - Grand Cayman KY
  • Tong; Wei Hua - Singapore SG
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Conformal nitridation of one or more fin-type transistor layers
Grant 9,698,269 - Tong , et al. July 4, 2
2017-07-04
Forming self-aligned NiSi placement with improved performance and yield
Grant 9,607,989 - Wu , et al. March 28, 2
2017-03-28
Methods For Fabricating Semiconductor Structure With Condensed Silicon Germanium Layer
App 20160254145 - TRIYOSO; Dina H. ;   et al.
2016-09-01
Conformal Nitridation Of One Or More Fin-type Transistor Layers
App 20160190324 - TONG; Wei Hua ;   et al.
2016-06-30
FORMING SELF-ALIGNED NiSi PLACEMENT WITH IMPROVED PERFORMANCE AND YIELD
App 20160163702 - WU; Xusheng ;   et al.
2016-06-09
Fabricating transistor(s) with raised active regions having angled upper surfaces
Grant 9,331,159 - Jha , et al. May 3, 2
2016-05-03
Conformal nitridation of one or more fin-type transistor layers
Grant 9,312,145 - Tong , et al. April 12, 2
2016-04-12
Forming a gate by depositing a thin barrier layer on a titanium nitride cap
Grant 9,202,697 - Luo , et al. December 1, 2
2015-12-01
Conformal Nitridation Of One Or More Fin-type Transistor Layers
App 20150255277 - TONG; Wei Hua ;   et al.
2015-09-10
Integrated circuits and methods of forming integrated circuits with interlayer dielectric protection
Grant 9,123,783 - Wang , et al. September 1, 2
2015-09-01
Integrated circuits including FINFET devices with shallow trench isolation that includes a thermal oxide layer and methods for making the same
Grant 9,087,870 - Tong , et al. July 21, 2
2015-07-21
Systems And Methods For Fabricating Gate Structures For Semiconductor Devices
App 20150024585 - LUO; Tien-Ying ;   et al.
2015-01-22
Method Of Forming Fins With Recess Shapes
App 20150017774 - TONG; Wei Hua ;   et al.
2015-01-15
Integrated Circuits Including Finfet Devices With Shallow Trench Isolation That Includes A Thermal Oxide Layer And Methods For Making The Same
App 20140353795 - Tong; Wei Hua ;   et al.
2014-12-04
Integrated Circuits And Methods Of Forming Integrated Circuits With Interlayer Dielectric Protection
App 20140131881 - Wang; Xin ;   et al.
2014-05-15
Integrated circuits having replacement gate structures and methods for fabricating the same
Grant 8,722,485 - Tong , et al. May 13, 2
2014-05-13
Reduced metal pipe formation in metal silicide contacts
Grant 7,935,632 - Tong , et al. May 3, 2
2011-05-03
Reduced Metal Pipe Formation In Metal Silicide Contacts
App 20090114997 - TONG; Wei Hua ;   et al.
2009-05-07
Double acting cold trap
Grant 6,814,812 - Tong , et al. November 9, 2
2004-11-09
Double acting cold trap
App 20030226366 - Tong, Wei Hua ;   et al.
2003-12-11

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