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Patent applications and USPTO patent grants for Tomizawa; Hiroshi.The latest application filed is for "wiring substrate and semiconductor device".
Patent | Date |
---|---|
Careless wiring substrate having an insulation layer with a bulged covering portion and semiconductor device thereof Grant 9,799,595 - Tomizawa , et al. October 24, 2 | 2017-10-24 |
Wiring Substrate And Semiconductor Device App 20170125333 - TOMIZAWA; HIROSHI ;   et al. | 2017-05-04 |
Method And Device For Detecting Termination Of Etching App 20140131707 - Tomizawa; Hiroshi ;   et al. | 2014-05-15 |
Microlens manufacturing method and solid-state image pick-up unit manufacturing method Grant 7,309,562 - Tomizawa December 18, 2 | 2007-12-18 |
Microlens manufacturing method and solid-state image pick-up unit manufacturing method App 20060194153 - Tomizawa; Hiroshi | 2006-08-31 |
Method of detecting recovery from fault in a data transmission system which effects loopback control Grant 4,704,714 - Tomizawa , et al. November 3, 1 | 1987-11-03 |
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