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Tomishima; Shigeki Patent Filings

Tomishima; Shigeki

Patent Applications and Registrations

Patent applications and USPTO patent grants for Tomishima; Shigeki.The latest application filed is for "high speed memory system integration".

Company Profile
25.112.99
  • Tomishima; Shigeki - Portland OR
  • Tomishima; Shigeki - Boise ID
  • Tomishima; Shigeki - Tsukuba JP
  • Tomishima; Shigeki - Tokyo JP
  • Tomishima; Shigeki - Hyogo JP
  • Tomishima, Shigeki - Ibaraki JP
  • Tomishima; Shigeki - Itami JP
  • Tomishima; Shigeki - Hyogo-ken JP
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Architecture and processes to enable high capacity memory packages through memory die stacking
Grant 11,456,281 - Li , et al. September 27, 2
2022-09-27
High Speed Memory System Integration
App 20220197806 - TOMISHIMA; Shigeki ;   et al.
2022-06-23
Data Processing Near Data Storage
App 20220179594 - SHAH; Nilesh N. ;   et al.
2022-06-09
Technologies for providing multiple tier memory media management
Grant 11,301,167 - Khan , et al. April 12, 2
2022-04-12
Technologies For Preserving Error Correction Capability In Compute-in-memory Operations
App 20220075684 - Chauhan; Chetan ;   et al.
2022-03-10
Data processing near data storage
Grant 11,262,954 - Shah , et al. March 1, 2
2022-03-01
Technologies for providing ECC pre-provisioning and handling for cross-point memory and compute operations
Grant 11,237,903 - Sundaram , et al. February 1, 2
2022-02-01
High Speed Memory System Integration
App 20210391301 - TOMISHIMA; Shigeki ;   et al.
2021-12-16
Technologies for providing adaptive memory media management
Grant 11,182,158 - Querbach , et al. November 23, 2
2021-11-23
Technologies for preserving error correction capability in compute-in-memory operations
Grant 11,182,242 - Chauhan , et al. November 23, 2
2021-11-23
Stacked Memory Chip Solution With Reduced Package Inputs/outputs (i/os)
App 20210335393 - ZHAO; Chong J. ;   et al.
2021-10-28
Techniques To Couple High Bandwidth Memory Device On Silicon Substrate And Package Substrate
App 20210335414 - ZHAO; Chong J. ;   et al.
2021-10-28
Technologies for providing a scalable architecture for performing compute operations in memory
Grant 11,080,226 - Tomishima , et al. August 3, 2
2021-08-03
Techniques to couple high bandwidth memory device on silicon substrate and package substrate
Grant 11,056,179 - Zhao , et al. July 6, 2
2021-07-06
Technologies for providing multiple levels of error correction
Grant 11,023,320 - Wu , et al. June 1, 2
2021-06-01
Two Transistor Gain Cell Memory With Indium Gallium Zinc Oxide
App 20210151437 - TOMISHIMA; Shigeki
2021-05-20
Technologies For Providing A Scalable Architecture For Performing Compute Operations In Memory
App 20200311019 - TOMISHIMA; Shigeki ;   et al.
2020-10-01
Systems, methods, and apparatus for combatting direct memory access attacks
Grant 10,783,281 - Trikalinou , et al. Sept
2020-09-22
Data Processing Near Data Storage
App 20200167098 - SHAH; Nilesh N. ;   et al.
2020-05-28
Techniques To Couple High Bandwidth Memory Device On Silicon Substrate And Package Substrate
App 20200143870 - ZHAO; Chong J. ;   et al.
2020-05-07
High Bandwidth Dram Memory With Wide Prefetch
App 20200135259 - Tomishima; Shigeki
2020-04-30
Architecture And Processes To Enable High Capacity Memory Packages Through Memory Die Stacking
App 20200105719 - LI; Yi ;   et al.
2020-04-02
Bitcell state retention
Grant 10,600,462 - Augustine , et al.
2020-03-24
Adaptive error correction in memory devices
Grant 10,552,257 - Naeimi , et al. Fe
2020-02-04
Technologies for providing a scalable architecture for performing compute operations in memory
Grant 10,534,747 - Tomishima , et al. Ja
2020-01-14
Programmable data pattern for repeated writes to memory
Grant 10,490,239 - Tomishima , et al. Nov
2019-11-26
Technologies For Providing Ecc Pre-provisioning And Handling For Cross-point Memory And Compute Operations
App 20190310911 - Sundaram; Rajesh ;   et al.
2019-10-10
Technologies For Preserving Error Correction Capability In Compute-near-memory Operations
App 20190303237 - Chauhan; Chetan ;   et al.
2019-10-03
Methods and systems for performing a calculation across a memory array
Grant 10,418,098 - Srinivasan , et al. Sept
2019-09-17
Technologies For Providing Adaptive Memory Media Management
App 20190272173 - Querbach; Bruce ;   et al.
2019-09-05
Technologies For Providing Multiple Tier Memory Media Management
App 20190272121 - Khan; Jawad B. ;   et al.
2019-09-05
Technologies For Performing Macro Operations In Memory
App 20190266219 - Chauhan; Chetan ;   et al.
2019-08-29
Technologies For Providing High Efficiency Compute Architecture On Cross Point Memory For Artificial Intelligence Operations
App 20190228809 - Srinivasan; Srikanth ;   et al.
2019-07-25
Technologies For Performing Tensor Operations In Memory
App 20190227750 - Srinivasan; Srikanth ;   et al.
2019-07-25
Technologies For Providing A Scalable Architecture For Performing Compute Operations In Memory
App 20190227981 - Tomishima; Shigeki ;   et al.
2019-07-25
Technologies For Providing Multiple Levels Of Error Correction
App 20190227871 - Wu; Wei ;   et al.
2019-07-25
Magnetic storage cell memory with back hop-prevention
Grant 10,297,302 - Augustine , et al.
2019-05-21
DRAM data path sharing via a split local data bus
Grant 10,217,493 - Wu , et al. Feb
2019-02-26
Methods And Systems For Performing A Calculation Across A Memory Array
App 20190043572 - SRINIVASAN; SRIKANTH T. ;   et al.
2019-02-07
Systems, Methods, And Apparatus For Combatting Direct Memory Access Attacks
App 20190042802 - Trikalinou; Anna ;   et al.
2019-02-07
DRAM data path sharing via a segmented global data bus
Grant 10,083,140 - Wu , et al. September 25, 2
2018-09-25
Apparatuses and methods for accessing and scheduling between a plurality of row buffers
Grant 10,068,636 - Akin , et al. September 4, 2
2018-09-04
Technologies for physically unclonable functions with magnetic tunnel junctions
Grant 10,069,628 - Tomishima September 4, 2
2018-09-04
Supply-switched dual cell memory bitcell
Grant 10,056,127 - Tomishima August 21, 2
2018-08-21
Dram Data Path Sharing Via A Split Local Data Bus
App 20180218759 - WU; Wei ;   et al.
2018-08-02
Techniques for a write zero operation
Grant 10,031,684 - Tomishima , et al. July 24, 2
2018-07-24
Physically Unclonable Function Generation With Direct Twin Cell Activation
App 20180191512 - TOMISHIMA; Shigeki
2018-07-05
Apparatuses And Methods For Accessing And Scheduling Between A Plurality Of Row Buffers
App 20180190339 - Akin; Berkin ;   et al.
2018-07-05
Programmable Data Pattern For Repeated Writes To Memory
App 20180181344 - TOMISHIMA; Shigeki ;   et al.
2018-06-28
Adaptive Error Correction In Memory Devices
App 20180165152 - Naeimi; Helia ;   et al.
2018-06-14
Techniques For A Write Zero Operation
App 20180136861 - TOMISHIMA; Shigeki ;   et al.
2018-05-17
DRAM data path sharing via a split local data bus and a segmented global data bus
Grant 9,965,415 - Wu , et al. May 8, 2
2018-05-08
Staggering Initiation Of Refresh In A Group Of Memory Devices
App 20180096719 - TOMISHIMA; Shigeki ;   et al.
2018-04-05
DRAM data path sharing via a split local data bus
Grant 9,934,827 - Wu , et al. April 3, 2
2018-04-03
Apparatus and method for detecting single flip-error in a complementary resistive memory
Grant 9,934,082 - Tomishima , et al. April 3, 2
2018-04-03
Technologies For Physically Unclonable Functions With Magnetic Tunnel Junctions
App 20180091300 - Tomishima; Shigeki
2018-03-29
Apparatus and method for page copying within sections of a memory
Grant 9,922,695 - Tomishima , et al. March 20, 2
2018-03-20
Magnetic Field-assisted Memory Operation
App 20180025764 - NAEIMI; Helia ;   et al.
2018-01-25
Apparatuses, methods, and systems for increasing a speed of removal of data from a memory cell
Grant 9,858,984 - Lu , et al. January 2, 2
2018-01-02
Supply-switched Dual Cell Memory Bitcell
App 20170345477 - TOMISHIMA; Shigeki
2017-11-30
Apparatus to reduce retention failure in complementary resistive memory
Grant 9,830,988 - Augustine , et al. November 28, 2
2017-11-28
Bitcell State Retention
App 20170337958 - AUGUSTINE; Charles ;   et al.
2017-11-23
Techniques for a write zero operation
Grant 9,804,793 - Tomishima , et al. October 31, 2
2017-10-31
Hidden refresh control in dynamic random access memory
Grant 9,761,297 - Tomishima September 12, 2
2017-09-12
Techniques for a Write Zero Operation
App 20170255406 - Tomishima; Shigeki ;   et al.
2017-09-07
Magnetic field-assisted memory operation
Grant 9,747,967 - Naeimi , et al. August 29, 2
2017-08-29
Supply-switched dual cell memory bitcell
Grant 9,715,916 - Tomishima July 25, 2
2017-07-25
Dram Data Path Sharing Via A Split Local Data Bus
App 20170178697 - WU; Wei ;   et al.
2017-06-22
Magnetic Storage Cell Memory With Back Hop-prevention
App 20170178708 - AUGUSTINE; Charles ;   et al.
2017-06-22
Dram Data Path Sharing Via A Split Local Data Bus And A Segmented Global Data Bus
App 20170177519 - WU; Wei ;   et al.
2017-06-22
Dram Data Path Sharing Via A Segmented Global Data Bus
App 20170177526 - WU; Wei ;   et al.
2017-06-22
Apparatus And Method For Detecting Single Flip-error In A Complementary Resistive Memory
App 20170153933 - TOMISHIMA; Shigeki ;   et al.
2017-06-01
Bitcell state retention
Grant 9,666,257 - Augustine , et al. May 30, 2
2017-05-30
Memory cells having a folded digit line architecture
Grant 9,653,468 - Tomishima May 16, 2
2017-05-16
Temperature Dependent Multiple Mode Error Correction
App 20170126249 - WU; Wei ;   et al.
2017-05-04
Apparatuses, Methods, And Systems For Increasing A Speed Of Removal Of Data From A Memory Cell
App 20170103801 - Lu; Shih-Lien ;   et al.
2017-04-13
Apparatus, system and method for determining comparison information based on memory data
Grant 9,600,183 - Tomishima , et al. March 21, 2
2017-03-21
Apparatuses and systems for increasing a speed of removal of data stored in a memory cell
Grant 9,558,807 - Lu , et al. January 31, 2
2017-01-31
Adaptive Error Correction In Memory Devices
App 20160378591 - Naeimi; Helia ;   et al.
2016-12-29
Internal Consecutive Row Access For Long Burst Length
App 20160378366 - Tomishima; Shigeki ;   et al.
2016-12-29
Magnetic Storage Cell Memory With Back Hop-prevention
App 20160379700 - AUGUSTINE; CHARLES ;   et al.
2016-12-29
Apparatuses And Systems For Increasing A Speed Of Removal Of Data Stored In A Memory Cell
App 20160379705 - Lu; Shih-Lien ;   et al.
2016-12-29
Apparatus and method for detecting single flip-error in a complementary resistive memory
Grant 9,529,660 - Tomishima , et al. December 27, 2
2016-12-27
Magnetic storage cell memory with back hop-prevention
Grant 9,514,796 - Augustine , et al. December 6, 2
2016-12-06
Memory Cells Having A Folded Digit Line Architecture
App 20160322363 - Tomishima; Shigeki
2016-11-03
Apparatus To Reduce Retention Failure In Complementary Resistive Memory
App 20160314838 - Augustine; Charles ;   et al.
2016-10-27
Bitcell State Retention
App 20160314826 - AUGUSTINE; Charles ;   et al.
2016-10-27
Method And Apparatus For Performing Data Operations Within A Memory Device
App 20160284390 - Tomishima; Shigeki ;   et al.
2016-09-29
Self-storing And Self-restoring Non-volatile Static Random Access Memory
App 20160284406 - Tomishima; Shigeki ;   et al.
2016-09-29
Apparatus And Method For Detecting Single Flip-error In A Complementary Resistive Memory
App 20160259676 - Tomishima; Shigeki
2016-09-08
Self-storing and self-restoring non-volatile static random access memory
Grant 9,437,298 - Tomishima , et al. September 6, 2
2016-09-06
Security Mode Data Protection
App 20160188890 - NAEIMI; Helia ;   et al.
2016-06-30
Event Triggered Erasure For Data Security
App 20160188495 - NAEIMI; Helia ;   et al.
2016-06-30
Apparatus to reduce retention failure in complementary resistive memory
Grant 9,373,395 - Augustine , et al. June 21, 2
2016-06-21
Charge level maintenance in a memory
Grant 9,361,972 - Tomishima June 7, 2
2016-06-07
Magnetic Field-assisted Memory Operation
App 20160093355 - NAEIMI; Helia ;   et al.
2016-03-31
Apparatus, System And Method For Determining Comparison Information Based On Memory Data
App 20160085443 - TOMISHIMA; SHIGEKI ;   et al.
2016-03-24
Circuits and methods for providing data to and from arrays of memory cells
Grant 9,268,690 - Tomishima February 23, 2
2016-02-23
Memory device word line drivers and methods
Grant 9,159,392 - Kim , et al. October 13, 2
2015-10-13
Circuits And Methods For Providing Data To And From Arrays Of Memory Cells
App 20150039843 - TOMISHIMA; SHIGEKI
2015-02-05
Memory Cells Having A Folded Digit Line Architecture
App 20150014758 - Tomishima; Shigeki
2015-01-15
Memory cells having a folded digit line architecture
Grant 8,872,247 - Tomishima October 28, 2
2014-10-28
Circuits and methods for providing data to and from arrays of memory cells
Grant 8,873,314 - Tomishima October 28, 2
2014-10-28
Memory Device Word Line Drivers And Methods
App 20140226427 - Kim; Tae ;   et al.
2014-08-14
Memory device word line drivers and methods
Grant 8,737,157 - Kim , et al. May 27, 2
2014-05-27
Circuits And Methods For Providing Data To And From Arrays Of Memory Cells
App 20120117336 - Tomishima; Shigeki
2012-05-10
Memory Device Word Line Drivers And Methods
App 20120063256 - Kim; Tae ;   et al.
2012-03-15
Memory Device Word Line Drivers And Methods
App 20110317509 - KIM; TAE ;   et al.
2011-12-29
Memory Cells Having A Folded Digit Line Architecture
App 20110103125 - Tomishima; Shigeki
2011-05-05
Apparatus for memory device wordline
Grant 7,760,582 - Tomishima July 20, 2
2010-07-20
Negative voltage driving for the digit line isolation gates
Grant 7,697,357 - Tomishima April 13, 2
2010-04-13
Capacitor supported precharging of memory digit lines
Grant 7,663,952 - Tomishima February 16, 2
2010-02-16
Low voltage data path and current sense amplifier
Grant 7,590,019 - Tomishima September 15, 2
2009-09-15
Low Voltage Data Path And Current Sense Amplifier
App 20090073791 - Tomishima; Shigeki
2009-03-19
Capacitor supported precharching of memory digit lines
App 20090003038 - Tomishima; Shigeki
2009-01-01
Low voltage data path and current sense amplifier
Grant 7,466,615 - Tomishima December 16, 2
2008-12-16
Apparatus For Memory Device Wordline
App 20080225627 - Tomishima; Shigeki
2008-09-18
Capacitor supported precharging of memory digit lines
Grant 7,423,923 - Tomishima September 9, 2
2008-09-09
Apparatus for memory device wordline
Grant 7,385,871 - Tomishima June 10, 2
2008-06-10
Low voltage data path and current sense amplifier
App 20070177442 - Tomishima; Shigeki
2007-08-02
Capacitor supported precharging of memory digit lines
App 20070097764 - Tomishima; Shigeki
2007-05-03
Semiconductor integrated circuit device comprising RAM with command decode system and logic circuit integrated into a single chip and testing method of the RAM with command decode system
Grant RE39,579 - Hatakenaka , et al. April 17, 2
2007-04-17
Capacitor supported precharging of memory digit lines
Grant 7,177,213 - Tomishima February 13, 2
2007-02-13
Negative voltage driving for the digit line isolation gates
App 20060209604 - Tomishima; Shigeki
2006-09-21
Apparatus for memory device wordline
App 20060198232 - Tomishima; Shigeki
2006-09-07
Method and apparatus for memory device wordline
Grant 7,046,578 - Tomishima May 16, 2
2006-05-16
Method And Apparatus For Memory Device Wordline
App 20060039228 - Tomishima; Shigeki
2006-02-23
Capacitor supported precharging of memory digit lines
App 20060034113 - Tomishima; Shigeki
2006-02-16
Semiconductor device suitable for system in package
Grant 6,977,849 - Tomishima December 20, 2
2005-12-20
Semiconductor memory device
Grant 6,953,960 - Tomishima October 11, 2
2005-10-11
Semiconductor integrated circuit device with internal power supply potential generation circuit
Grant 6,885,235 - Tomishima , et al. April 26, 2
2005-04-26
Semiconductor memory device having a low potential body section
Grant 6,861,708 - Tomishima March 1, 2
2005-03-01
Semiconductor device suitable for system in package
App 20050041482 - Tomishima, Shigeki
2005-02-24
Semiconductor memory device capable of overcoming refresh disturb
Grant 6,859,403 - Hidaka , et al. February 22, 2
2005-02-22
Semiconductor memory device having two-transistor, one-capacitor type memory cells of high data holding characteristic
Grant 6,859,384 - Tomishima February 22, 2
2005-02-22
Semiconductor device with address programming circuit
Grant 6,812,532 - Ooishi , et al. November 2, 2
2004-11-02
Semiconductor device suitable for system in package
Grant 6,807,109 - Tomishima October 19, 2
2004-10-19
Semiconductor memory device
App 20040184332 - Hidaka, Hideto ;   et al.
2004-09-23
Semiconductor device and manufacturing method therefor
App 20040056308 - Tomishima, Shigeki
2004-03-25
Memory device containing arbiter performing arbitration for bus access right
App 20040034748 - Tomishima, Shigeki ;   et al.
2004-02-19
Fast accessible semiconductor memory device
Grant 6,646,946 - Tomishima , et al. November 11, 2
2003-11-11
Synchronous semiconductor memory device allowing control of operation mode in accordance with operation conditions of a system
Grant 6,618,319 - Ooishi , et al. September 9, 2
2003-09-09
Synchronous semiconductor memory device allowing control of operation mode in accordance with operation conditions of a system
App 20030147298 - Ooishi, Tsukasa ;   et al.
2003-08-07
Semiconductor memory device having two-transistor, one-capacitor type memory cells of high data holding characteristic
App 20030117832 - Tomishima, Shigeki
2003-06-26
Semiconductor chip, semiconductor device, and process for producing a semiconductor device
Grant 6,580,092 - Tomishima June 17, 2
2003-06-17
Semiconductor device suitable for system in package
App 20030102568 - Tomishima, Shigeki
2003-06-05
Antifuse address detecting circuit programmable by applying a high voltage and semiconductor integrated circuit device provided with the same
Grant 6,545,926 - Ooishi , et al. April 8, 2
2003-04-08
Semiconductor integrated circuit device with internal power supply potential generation circuit
App 20030007296 - Tomishima, Shigeki ;   et al.
2003-01-09
Semiconductor device with address programming circuit
App 20020185694 - Ooishi, Tsukasa ;   et al.
2002-12-12
Semiconductor device provided with boost circuit consuming less current
Grant 6,489,796 - Tomishima December 3, 2
2002-12-03
Memory system for synchronized and high speed data transfer
Grant 6,480,946 - Tomishima , et al. November 12, 2
2002-11-12
Semiconductor memory device
App 20020153545 - Tomishima, Shigeki
2002-10-24
Semiconductor memory device
App 20020149973 - Hidaka, Hideto ;   et al.
2002-10-17
Semiconductor memory device having a column select line transmitting a column select signal
Grant 6,466,509 - Tanizaki , et al. October 15, 2
2002-10-15
Synchronous semiconductor memory device allowing control of operation mode in accordance with operation conditions of a system
Grant 6,438,066 - Ooishi , et al. August 20, 2
2002-08-20
Semiconductor chip, semiconductor device, and process for producing a semiconductor device
App 20020093014 - Tomishima, Shigeki
2002-07-18
Antifuse Address Detecting Circuit Programmable By Applying A High Voltage And Semiconductor Integrated Circuit Device Provided With The Same
App 20020075743 - OOISHI, TSUKASA ;   et al.
2002-06-20
Semiconductor device including a fuse circuit in which the electric current is cut off after blowing so as to prevent voltage fall
Grant 6,400,632 - Tanizaki , et al. June 4, 2
2002-06-04
Synchronous semiconductor integrated circuit device capable of test time reduction
Grant 6,385,125 - Ooishi , et al. May 7, 2
2002-05-07
Semiconductor Device Including A Fuse Circuit In Which The Electric Current Is Cut Off After Blowing So As To Prevent Voltage Fall
App 20020051399 - Tanizaki, Hiroaki ;   et al.
2002-05-02
Synchronous Semiconductor Integrated Circuit Device Capable Of Test Time Reduction
App 20020051404 - OOISHI, TSUKASA ;   et al.
2002-05-02
Server and terminals used in management system for serving food and beverage
App 20020052790 - Tomishima, Shigeki
2002-05-02
Synchronous Semiconductor Memory Device Capable Of Performing Operation Test At High Speed While Reducing Burden On Tester
App 20020049946 - TOMISHIMA, SHIGEKI ;   et al.
2002-04-25
Signal potential conversion circuit
Grant 6,373,315 - Tsuji , et al. April 16, 2
2002-04-16
Dynamic Semiconductor Memory Device Having Excellent Charge Retention Characteristics
App 20020024873 - TOMISHIMA, SHIGEKI ;   et al.
2002-02-28
Fast accessible semiconductor memory device
App 20020015350 - Tomishima, Shigeki ;   et al.
2002-02-07
Semiconductor Device
App 20020008279 - OOISHI, TSUKASA ;   et al.
2002-01-24
Semiconductor Device Having Hierarchical Power Supply Line Structure Improved In Operating Speed
App 20020000873 - TANIZAKI, HIROAKI ;   et al.
2002-01-03
Semiconductor device provided with boost circuit consuming less current
App 20020000822 - Tomishima, Shigeki
2002-01-03
Semiconductor memory device with readily changeable memory capacity
Grant 6,333,869 - Tanizaki , et al. December 25, 2
2001-12-25
Synchronous semiconductor memory device having redundant circuit of high repair efficiency and allowing high speed access
Grant 6,331,956 - Ooishi , et al. December 18, 2
2001-12-18
Signal potential conversion circuit
App 20010045859 - Tsuji, Takaharu ;   et al.
2001-11-29
Fast accessible semiconductor memory device
Grant 6,314,042 - Tomishima , et al. November 6, 2
2001-11-06
Multi-bank semiconductor memory device suitable for integration with logic
Grant 6,310,815 - Yamagata , et al. October 30, 2
2001-10-30
Synchronous type semiconductor memory device permitting reduction in ratio of area occupied by control circuit in chip area
Grant 6,301,187 - Ooishi , et al. October 9, 2
2001-10-09
Semiconductor memory device
App 20010024383 - Hidaka, Hideto ;   et al.
2001-09-27
Boosted-voltage drive circuit operable with high reliability and semiconductor memory device employing the same
App 20010000989 - Tomishima, Shigeki ;   et al.
2001-05-10
Semiconductor integrated circuit device with large internal bus width, including memory and logic circuit
Grant 6,163,493 - Yamagata , et al. December 19, 2
2000-12-19
Synchronous semiconductor memory device suitable for merging with logic
Grant 6,134,178 - Yamazaki , et al. October 17, 2
2000-10-17
Synchronous semiconductor memory device allowing control of operation mode in accordance with operation conditions of a system
Grant 6,125,078 - Ooishi , et al. September 26, 2
2000-09-26
Semiconductor memory device
Grant 6,081,443 - Morishita , et al. June 27, 2
2000-06-27
Semiconductor memory device implementing multi-bank configuration with reduced number of signal lines
Grant 6,078,542 - Tomishima June 20, 2
2000-06-20
Synchronous semiconductor memory device having redundant circuit of high repair efficiency and allowing high speed access
Grant 6,067,260 - Ooishi , et al. May 23, 2
2000-05-23
Synchronous semiconductor memory device capable of reducing power dissipation by suppressing leakage current during stand-by and in active operation
Grant 6,055,206 - Tanizaki , et al. April 25, 2
2000-04-25
Semiconductor memory device allowing high-speed activation of internal circuit
Grant 6,031,781 - Tsuji , et al. February 29, 2
2000-02-29
Semiconductor memory device
Grant 5,943,273 - Hidaka , et al. August 24, 1
1999-08-24
Semiconductor memory device capable of block writing in large bus width
Grant 5,930,194 - Yamagata , et al. July 27, 1
1999-07-27
Semiconductor integrated circuit device comprising synchronous DRAM core and logic circuit integrated into a single chip and method of testing the synchronous DRAM core
Grant 5,910,181 - Hatakenaka , et al. June 8, 1
1999-06-08
Step-up potential supply circuit and semiconductor storage device
Grant 5,909,141 - Tomishima June 1, 1
1999-06-01
Semiconductor memory device
Grant 5,877,978 - Morishita , et al. March 2, 1
1999-03-02
Column selecting circuit in semiconductor memory device
Grant RE36,089 - Ooishi , et al. February 9, 1
1999-02-09
Dynamic semiconductor memory device having excellent charge retention characteristics
Grant 5,870,348 - Tomishima , et al. February 9, 1
1999-02-09
Arrangement of power supply and data input/output pads in semiconductor memory device
Grant 5,838,627 - Tomishima , et al. November 17, 1
1998-11-17
Dynamic semiconductor memory device with SOI structure and body refresh circuitry
Grant 5,822,264 - Tomishima , et al. October 13, 1
1998-10-13
Dynamic random access memory having an internal circuit using a boosted potential
Grant 5,774,405 - Tomishima June 30, 1
1998-06-30
Semiconductor memory device having power line arranged in a meshed shape
Grant 5,724,293 - Tomishima , et al. March 3, 1
1998-03-03
Semiconductor memory device provided with sense amplifier capable of high speed operation with low power consumption
Grant 5,696,727 - Tsukude , et al. December 9, 1
1997-12-09
Semiconductor memory device
Grant 5,687,123 - Hidaka , et al. November 11, 1
1997-11-11
Semiconductor memory device having power line arranged in a meshed shape
Grant 5,650,972 - Tomishima , et al. July 22, 1
1997-07-22
Semiconductor memory device having a voltage down converter for generating an internal power supply voltage from an external power supply
Grant 5,612,920 - Tomishima March 18, 1
1997-03-18
Arrangement of power supply and data input/output pads in semiconductor memory device
Grant 5,604,710 - Tomishima , et al. February 18, 1
1997-02-18
Semiconductor memory device responsive to hierarchical internal potentials
Grant 5,604,707 - Kuge , et al. February 18, 1
1997-02-18
Signal output circuit operating stably and arrangement of power supply interconnection line therefor in semiconductor integrated circuit device
Grant 5,574,397 - Tomishima , et al. November 12, 1
1996-11-12
Semiconductor memory device having power line arranged in a meshed shape
Grant 5,325,336 - Tomishima , et al. June 28, 1
1994-06-28
Layout of a semiconductor memory device
Grant 5,321,646 - Tomishima , et al. June 14, 1
1994-06-14
Column selecting circuit in semiconductor memory device
Grant 5,315,548 - Ooishi , et al. May 24, 1
1994-05-24

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