loadpatents
name:-0.026278018951416
name:-0.022921085357666
name:-0.0015218257904053
Toh; Chin Hock Patent Filings

Toh; Chin Hock

Patent Applications and Registrations

Patent applications and USPTO patent grants for Toh; Chin Hock.The latest application filed is for "structure and method of fabricating three-dimensional (3d) metal-insulator-metal (mim) capacitor and resistor in semi-additive plating metal wiring".

Company Profile
1.29.26
  • Toh; Chin Hock - Singapore SG
  • Toh; Chin Hock - Sibu MY
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Sealing structure for workpiece to substrate bonding in a processing chamber
Grant 10,978,334 - Toh , et al. April 13, 2
2021-04-13
Structure and method of fabricating three-dimensional (3D) metal-insulator-metal (MIM) capacitor and resistor in semi-additive plating metal wiring
Grant 9,954,051 - See , et al. April 24, 2
2018-04-24
Packaging structural member
Grant 9,704,726 - Toh , et al. July 11, 2
2017-07-11
Structure And Method Of Fabricating Three-dimensional (3d) Metal-insulator-metal (mim) Capacitor And Resistor In Semi-additive Plating Metal Wiring
App 20170104056 - SEE; Guan Huei ;   et al.
2017-04-13
Sealing Structure For Workpiece To Substrate Bonding In A Processing Chamber
App 20160064267 - Toh; Chin Hock ;   et al.
2016-03-03
Packaging Structural Member
App 20160005629 - TOH; Chin Hock ;   et al.
2016-01-07
Patterned photoresist to attach a carrier wafer to a silicon device wafer
Grant 9,219,044 - Toh , et al. December 22, 2
2015-12-22
Thin substrate and mold compound handling using an electrostatic-chucking carrier
Grant 9,202,801 - Toh , et al. December 1, 2
2015-12-01
Packaging structural member
Grant 9,142,487 - Toh , et al. September 22, 2
2015-09-22
Semiconductor packages and methods of packaging semiconductor devices
Grant 9,117,808 - Toh , et al. August 25, 2
2015-08-25
Thin Substrate And Mold Compound Handling Using An Electrostatic-chucking Carrier
App 20150137383 - Toh; Chin Hock ;   et al.
2015-05-21
Patterned Photoresist To Attach A Carrier Wafer To A Silicon Device Wafer
App 20150140801 - Toh; Chin Hock ;   et al.
2015-05-21
Passivation And Warpage Correction By Nitride Film For Molded Wafers
App 20140264954 - WONG; Loke Yuen ;   et al.
2014-09-18
Fabrication Of 3d Chip Stacks Without Carrier Plates
App 20140273354 - RAMASWAMI; Sesh ;   et al.
2014-09-18
Semiconductor Packages And Methods Of Packaging Semiconductor Devices
App 20140225242 - TOH; Chin Hock ;   et al.
2014-08-14
Interposer for semiconductor package
Grant 8,772,921 - Toh , et al. July 8, 2
2014-07-08
Through silicon via dies and packages
Grant 8,741,762 - Liu , et al. June 3, 2
2014-06-03
Semiconductor packages and methods of packaging semiconductor devices
Grant 8,703,534 - Toh , et al. April 22, 2
2014-04-22
Through Silicon Via Dies And Packages
App 20140045301 - LIU; Hao ;   et al.
2014-02-13
Semiconductor package and method of packaging semiconductor devices
Grant 8,647,924 - Toh , et al. February 11, 2
2014-02-11
Through silicon via dies and packages
Grant 8,586,465 - Liu , et al. November 19, 2
2013-11-19
Packaging Structural Member
App 20130119560 - TOH; Chin Hock ;   et al.
2013-05-16
Vented die and package
Grant 8,426,246 - Toh , et al. April 23, 2
2013-04-23
Mold design and semiconductor package
Grant 8,399,985 - Kolan , et al. March 19, 2
2013-03-19
Packaging structural member
Grant 8,384,203 - Toh , et al. February 26, 2
2013-02-26
Semiconductor Packages And Methods Of Packaging Semiconductor Devices
App 20120193812 - TOH; Chin Hock ;   et al.
2012-08-02
Vented Die And Package
App 20120149150 - TOH; Chin Hock ;   et al.
2012-06-14
Interposer For Semiconductor Package
App 20120104628 - TOH; Chin Hock ;   et al.
2012-05-03
Vented die and package
Grant 8,143,719 - Toh , et al. March 27, 2
2012-03-27
Interposer for semiconductor package
Grant 8,115,292 - Toh , et al. February 14, 2
2012-02-14
Mold Design And Semiconductor Package
App 20120018869 - KOLAN; Ravi Kanth ;   et al.
2012-01-26
Mold design and semiconductor package
Grant 8,030,761 - Kolan , et al. October 4, 2
2011-10-04
Semiconductor package and method of making the same
Grant 7,948,095 - Ng , et al. May 24, 2
2011-05-24
Semiconductor Package And Method Of Packaging Semiconductor Devices
App 20100261313 - TOH; Chin Hock ;   et al.
2010-10-14
Semiconductor Package And Method Of Making The Same
App 20100109169 - KOLAN; Ravi Kanth ;   et al.
2010-05-06
Interposer For Semiconductor Package
App 20100109142 - Toh; Chin Hock ;   et al.
2010-05-06
Packaging Structural Member
App 20100013081 - TOH; Chin Hock ;   et al.
2010-01-21
Vented Die And Package
App 20080303031 - TOH; Chin Hock ;   et al.
2008-12-11
Through Silicon Via Dies And Packages
App 20080303163 - LIU; Hao ;   et al.
2008-12-11
Mold Design And Semiconductor Package
App 20080290505 - KOLAN; Ravi Kanth ;   et al.
2008-11-27
Die stack system and method
App 20070210428 - Tan; Wooi Aun ;   et al.
2007-09-13

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