Toh; CheeSeng

Patent Applications and Registrations

Patent applications and USPTO patent grants for Toh; CheeSeng.The latest application filed is for "logical block address mapping".

Company Profile

0.6.7

Toh; CheeSeng - Singapore SG

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Buffer management for increased write speed in large sector data storage device Grant 9,298,393 - See , et al. March 29, 2	2016-03-29
Logical block address mapping Grant 9,146,683 - Wei , et al. September 29, 2	2015-09-29
Logical Block Address Mapping App 20120272038 - Wei; Bo ; et al.	2012-10-25
Solid state device pattern for non-solid state storage media Grant 7,783,830 - Chng , et al. August 24, 2	2010-08-24
Buffer Management for Increased Write Speed in Large Sector Data Storage Device App 20090313426 - See; KokChoon ; et al.	2009-12-17
Prediction-based data reassignment Grant 7,627,778 - Chen , et al. December 1, 2	2009-12-01
Prediction-based Data Reassignment App 20080155304 - Chen; HuaYuan ; et al.	2008-06-26
Solid state device pattern for non-solid state storage media App 20080123211 - Chng; YongPeng ; et al.	2008-05-29
Interlaced even and odd address mapping App 20070050593 - Chen; HuaYuan ; et al.	2007-03-01
Processing an information payload in a communication interface App 20060251087 - Ng; WeiLoon ; et al.	2006-11-09
System and method of a minimized representation of a sector variable-bits-per-inch table App 20020013865 - Toh, CheeSeng ; et al.	2002-01-31

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