loadpatents
name:-0.043182849884033
name:-0.017235994338989
name:-0.0030639171600342
Tiwari; Rajesh Patent Filings

Tiwari; Rajesh

Patent Applications and Registrations

Patent applications and USPTO patent grants for Tiwari; Rajesh.The latest application filed is for "patron service method utilizing near-field communication tag identifiers".

Company Profile
2.15.32
  • Tiwari; Rajesh - San Ramon CA
  • TIWARI; Rajesh - Chelmsford MA
  • Tiwari; Rajesh - Bangalore IN
  • Tiwari; RAjesh - Plano TX
  • Tiwari; Rajesh - Sunnyvale CA
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Patron service method utilizing near-field communication tag identifiers
Grant 11,363,437 - Tiwari , et al. June 14, 2
2022-06-14
Patron Service Method Utilizing Near-field Communication Tag Identifiers
App 20210368316 - Tiwari; Rajesh ;   et al.
2021-11-25
Pre/post Deployment Customization
App 20200065119 - Cohen; Ariel ;   et al.
2020-02-27
Pre/post deployment customization
Grant 10,521,243 - Cohen , et al. Dec
2019-12-31
Conditioner For Chemical-mechanical-planarization Pad And Related Methods
App 20190351527 - TIWARI; Rajesh ;   et al.
2019-11-21
CMP pad conditioning assembly
Grant 10,471,567 - Doering , et al. Nov
2019-11-12
Method and apparatus for multiple memory shared collar architecture
Grant 9,971,663 - Bhushan Singh , et al. May 15, 2
2018-05-15
Continuous write and read operations for memories with latencies
Grant 9,972,402 - Bhushan Singh , et al. May 15, 2
2018-05-15
Pre/post Deployment Customization
App 20180081702 - Cohen; Ariel ;   et al.
2018-03-22
Osn/pcs Collaboration Mechanism Integration
App 20180081505 - Ron; Juan Allo ;   et al.
2018-03-22
Cmp Pad Conditioning Assembly
App 20180071891 - Doering; Patrick ;   et al.
2018-03-15
Multi-level Clock Gate Controls To Address Scan Mode Power Droop And Voltage Bump Requirement
App 20180019733 - Tiwari; Rajesh ;   et al.
2018-01-18
Continuous Write And Read Operations For Memories With Latencies
App 20170309348 - Bhushan Singh; Nishi ;   et al.
2017-10-26
Dynamically Configurable Shared Scan Clock Channel Architecture
App 20170184665 - Tiwari; Rajesh ;   et al.
2017-06-29
Enhanced Memory Built-in Self-test Architecture For De-featured Memories
App 20170110204 - Kothiala; Abhinav ;   et al.
2017-04-20
Scan Programmable Register Controlled Clock Architecture For Testing Asynchronous Domains
App 20160061892 - Tiwari; Rajesh ;   et al.
2016-03-03
Method And Apparatus For Multiple Memory Shared Collar Architecture
App 20160062864 - Bhushan Singh; Nishi ;   et al.
2016-03-03
Post-Polymer Revealing of Through-Substrate Via Tips
App 20140154880 - Brighton; Jeffrey E. ;   et al.
2014-06-05
Die Having Through-substrate Vias With Deformation Protected Tips
App 20140151895 - WEST; JEFFREY ALAN ;   et al.
2014-06-05
Through-silicon Via (tsv) Die And Method To Control Warpage
App 20140124900 - WEST; JEFFREY ALAN ;   et al.
2014-05-08
Fabricating A Semiconductor Die Having Coefficient Of Thermal Expansion Graded Layer
App 20140080301 - Kirkpatrick; Brian K. ;   et al.
2014-03-20
Die having coefficient of thermal expansion graded layer
Grant 8,618,661 - Kirkpatrick , et al. December 31, 2
2013-12-31
DEVICE HAVING TSVs WITH GETTERING LAYER LATERAL TO TSV TIPS
App 20130113103 - WEST; JEFFREY A. ;   et al.
2013-05-09
Die Having Coefficient Of Thermal Expansion Graded Layer
App 20130082385 - KIRKPATRICK; BRIAN K. ;   et al.
2013-04-04
Post-polymer Revealing Of Through-substrate Via Tips
App 20130062736 - BRIGHTON; JEFFREY E. ;   et al.
2013-03-14
Dual Depth Trench Termination Method For Improving Cu-based Interconnect Integrity
App 20090121358 - Tiwari; Rajesh ;   et al.
2009-05-14
Automatic formatting and validating of text for a markup language graphical user interface
Grant 7,519,905 - Kougiouris , et al. April 14, 2
2009-04-14
Dual depth trench termination method for improving Cu-based interconnect integrity
Grant 7,387,960 - Tiwari , et al. June 17, 2
2008-06-17
Versatile system for controlling semiconductor topography
Grant 7,010,381 - Patel , et al. March 7, 2
2006-03-07
Versatile system for variance-based data analysis
Grant 6,941,242 - Patel , et al. September 6, 2
2005-09-06
Versatile system for variance-based data analysis
App 20050075834 - Patel, Nital S. ;   et al.
2005-04-07
Versatile system for controlling semiconductor topography
App 20050064608 - Patel, Nital S. ;   et al.
2005-03-24
Dual depth trench termination method for improving Cu-based interconnect integrity
App 20050059189 - Tiwari, Rajesh ;   et al.
2005-03-17
Method of preventing seam defects in isolated lines
Grant 6,709,974 - Permana , et al. March 23, 2
2004-03-23
Automatic formatting and validating of text for a markup language graphical user interface
App 20040039993 - Kougiouris, Panagiotis ;   et al.
2004-02-26
Dynamic interaction manager for markup language graphical user interface
App 20040034833 - Kougiouris, Panagiotis ;   et al.
2004-02-19
Method of preventing seam defects in isolated lines
App 20030199150 - Permana, David ;   et al.
2003-10-23
Method for forming a copper interconnect using a multi-platen chemical mechanical polishing (CMP) process
App 20020151167 - Farkas, Janos ;   et al.
2002-10-17
Method for forming a copper interconnect using a multi-platen chemical mechanical polishing (CMP) process
Grant 6,444,569 - Farkas , et al. September 3, 2
2002-09-03
Method for forming a copper interconnect using a multi-platen chemical mechanical polishing (CMP) process
App 20010027083 - Farkas, Janos ;   et al.
2001-10-04

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