loadpatents
name:-0.0025398731231689
name:-0.016396045684814
name:-0.00044107437133789
Thurston; Andrew J. Patent Filings

Thurston; Andrew J.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Thurston; Andrew J..The latest application filed is for "system and method for implementing a reed solomon multiplication section from exclusive-or logic".

Company Profile
0.13.2
  • Thurston; Andrew J. - Allen TX
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
System and method for implementing a Reed Solomon multiplication section from exclusive-OR logic
Grant 8,176,396 - Dong , et al. May 8, 2
2012-05-08
BCH forward error correction decoder
Grant 7,447,982 - Thurston November 4, 2
2008-11-04
System And Method For Implementing A Reed Solomon Multiplication Section From Exclusive-or Logic
App 20080155382 - Dong; Qiujie ;   et al.
2008-06-26
System and method for implementing a Reed Solomon multiplication section from exclusive-OR logic
Grant 7,366,969 - Dong , et al. April 29, 2
2008-04-29
Non-standard concatenation mapping for payloads
Grant 7,227,844 - Hall , et al. June 5, 2
2007-06-05
Automatic generation of hardware description language code for complex polynomial functions
Grant 7,124,064 - Thurston October 17, 2
2006-10-17
System and method for implementing a Reed Solomon multiplication section from exclusive-OR logic
App 20060090119 - Dong; Qiujie ;   et al.
2006-04-27
Galois field multiply accumulator
Grant 7,003,715 - Thurston February 21, 2
2006-02-21
Error insertion circuit for SONET forward error correction
Grant 6,983,414 - Duschatko , et al. January 3, 2
2006-01-03
Path AIS insertion for concatenated payloads across multiple processors
Grant 6,973,041 - Duschatko , et al. December 6, 2
2005-12-06
Method and apparatus for detecting errors in a backplane frame
Grant 6,934,305 - Duschatko , et al. August 23, 2
2005-08-23
Channel ordering for communication signals split for matrix switching
Grant 6,801,548 - Duschatko , et al. October 5, 2
2004-10-05
Method and apparatus of framing high-speed signals
Grant 6,738,392 - Thurston May 18, 2
2004-05-18
Concatenation detection across multiple chips
Grant 6,735,197 - Duschatko , et al. May 11, 2
2004-05-11
Repetitive pattern testing circuit for AC-coupled systems
Grant 6,684,350 - Theodoras, II , et al. January 27, 2
2004-01-27

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