loadpatents
name:-0.0083320140838623
name:-0.011596918106079
name:-0.0010190010070801
Thompto; Brian William Patent Filings

Thompto; Brian William

Patent Applications and Registrations

Patent applications and USPTO patent grants for Thompto; Brian William.The latest application filed is for "parallel slice processor having a recirculating load-store queue for fast deallocation of issue queue entries".

Company Profile
1.26.27
  • Thompto; Brian William - Austin TX
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Parallel Slice Processor Having A Recirculating Load-store Queue For Fast Deallocation Of Issue Queue Entries
App 20210406023 - Ayub; Salma ;   et al.
2021-12-30
Parallel slice processor having a recirculating load-store queue for fast deallocation of issue queue entries
Grant 11,150,907 - Ayub , et al. October 19, 2
2021-10-19
Reconfigurable processor with load-store slices supporting reorder and controlling access to cache slices
Grant 10,983,800 - Eisen , et al. April 20, 2
2021-04-20
Linkable issue queue parallel execution slice processing method
Grant 10,223,125 - Brownscheidle , et al.
2019-03-05
Processing of multiple instruction streams in a parallel slice processor
Grant 10,157,064 - Eisen , et al. Dec
2018-12-18
Parallel Slice Processor Having A Recirculating Load-store Queue For Fast Deallocation Of Issue Queue Entries
App 20180336036 - Ayub; Salma ;   et al.
2018-11-22
Linkable Issue Queue Parallel Execution Slice Processing Method
App 20180336038 - Brownscheidle; Jeffrey Carl ;   et al.
2018-11-22
Linkable issue queue parallel execution slice for a processor
Grant 10,133,581 - Brownscheidle , et al. November 20, 2
2018-11-20
Parallel slice processor having a recirculating load-store queue for fast deallocation of issue queue entries
Grant 10,133,576 - Ayub , et al. November 20, 2
2018-11-20
Reconfigurable Processor With Load-store Slices Supporting Reorder And Controlling Access To Cache Slices
App 20180285118 - Eisen; Lee Evan ;   et al.
2018-10-04
Reconfigurable processor with load-store slices supporting reorder and controlling access to cache slices
Grant 10,083,039 - Eisen , et al. September 25, 2
2018-09-25
Reconfigurable Processor With Load-store Slices Supporting Reorder And Controlling Access To Cache Slices
App 20180150300 - Eisen; Lee Evan ;   et al.
2018-05-31
Reconfigurable parallel execution and load-store slice processor
Grant 9,977,678 - Eisen , et al. May 22, 2
2018-05-22
Reconfigurable processing method with modes controlling the partitioning of clusters and cache slices
Grant 9,971,602 - Eisen , et al. May 15, 2
2018-05-15
Parallel slice processor with dynamic instruction stream mapping
Grant 9,690,585 - Eisen , et al. June 27, 2
2017-06-27
Processing of multiple instruction streams in a parallel slice processor
Grant 9,690,586 - Eisen , et al. June 27, 2
2017-06-27
Processing Of Multiple Instruction Streams In A Parallel Slice Processor
App 20170168837 - Eisen; Lee Evan ;   et al.
2017-06-15
Processing of multiple instruction streams in a parallel slice processor
Grant 9,672,043 - Eisen , et al. June 6, 2
2017-06-06
Parallel slice processor with dynamic instruction stream mapping
Grant 9,665,372 - Eisen , et al. May 30, 2
2017-05-30
Linkable Issue Queue Parallel Execution Slice For A Processor
App 20160202990 - Brownscheidle; Jeffrey Carl ;   et al.
2016-07-14
Reconfigurable Parallel Execution And Load-store Slice Processing Methods
App 20160202991 - Eisen; Lee Evan ;   et al.
2016-07-14
Reconfigurable Parallel Execution And Load-store Slice Processor
App 20160202989 - Eisen; Lee Evan ;   et al.
2016-07-14
Parallel Slice Processor Having A Recirculating Load-store Queue For Fast Deallocation Of Issue Queue Entries
App 20160202986 - Ayub; Salma ;   et al.
2016-07-14
Linkable Issue Queue Parallel Execution Slice Processing Method
App 20160202992 - Brownscheidle; Jeffrey Carl ;   et al.
2016-07-14
Parallel Slice Processing Method Using A Recirculating Load-store Queue For Fast Deallocation Of Issue Queue Entries
App 20160202988 - Ayub; Salma ;   et al.
2016-07-14
Processing Of Multiple Instruction Streams In A Parallel Slice Processor
App 20150324205 - Eisen; Lee Evan ;   et al.
2015-11-12
Processing Of Multiple Instruction Streams In A Parallel Slice Processor
App 20150324207 - Eisen; Lee Evan ;   et al.
2015-11-12
Parallel Slice Processor With Dynamic Instruction Stream Mapping
App 20150324204 - Eisen; Lee Evan ;   et al.
2015-11-12
Parallel Slice Processor With Dynamic Instruction Stream Mapping
App 20150324206 - Eisen; Lee Evan ;   et al.
2015-11-12
Thread priority method for ensuring processing fairness in simultaneous multi-threading microprocessors
Grant 8,418,180 - Bishop , et al. April 9, 2
2013-04-09
Branch lookahead prefetch for microprocessors
Grant 7,877,580 - Eickemeyer , et al. January 25, 2
2011-01-25
Dynamic recalculation of resource vector at issue queue for steering of dependent instructions
Grant 7,650,486 - Le , et al. January 19, 2
2010-01-19
Thread priority method for ensuring processing fairness in simultaneous multi-threading microprocessors
Grant 7,631,308 - Bishop , et al. December 8, 2
2009-12-08
Using a modified value GPR to enhance lookahead prefetch
Grant 7,620,799 - Eickemeyer , et al. November 17, 2
2009-11-17
Load lookahead prefetch for microprocessors
Grant 7,594,096 - Eickemeyer , et al. September 22, 2
2009-09-22
Branch lookahead prefetch for microprocessors
Grant 7,552,318 - Eickemeyer , et al. June 23, 2
2009-06-23
Method for checkpointing instruction groups with out-of-order floating point instructions in a multi-threaded processor
Grant 7,478,276 - Bishop , et al. January 13, 2
2009-01-13
Thread Priority Method for Ensuring Processing Fairness in Simultaneous Multi-Threading Microprocessors
App 20080294884 - Bishop; James Wilson ;   et al.
2008-11-27
Load lookahead prefetch for microprocessors
Grant 7,444,498 - Eickemeyer , et al. October 28, 2
2008-10-28
Using a Modified Value GPR to Enhance Lookahead Prefetch
App 20080250230 - Eickemeyer; Richard James ;   et al.
2008-10-09
Using a modified value GPR to enhance lookahead prefetch
Grant 7,421,567 - Eickemeyer , et al. September 2, 2
2008-09-02
Branch lookahead prefetch for microprocessors
App 20080091928 - Eickemeyer; Richard James ;   et al.
2008-04-17
Load Lookahead Prefetch for Microprocessors
App 20080077776 - Eickemeyer; Richard James ;   et al.
2008-03-27
Method and apparatus for dynamic modification of microprocessor instruction group at dispatch
Grant 7,254,697 - Bishop , et al. August 7, 2
2007-08-07
Fencing off instruction buffer until re-circulation of rejected preceding and branch instructions to avoid mispredict flush
Grant 7,254,700 - Levitan , et al. August 7, 2
2007-08-07
Thread priority method, apparatus, and computer program product for ensuring processing fairness in simultaneous multi-threading microprocessors
App 20060184946 - Bishop; James Wilson ;   et al.
2006-08-17
Systems and methods for branch target fencing
App 20060184778 - Levitan; David Stephen ;   et al.
2006-08-17
Mini-refresh processor recovery as bug workaround method using existing recovery hardware
App 20060184771 - Floyd; Michael Stephen ;   et al.
2006-08-17
Method for checkpointing instruction groups with out-of-order floating point instructions in a multi-threaded processor
App 20060179346 - Bishop; James Wilson ;   et al.
2006-08-10
Load lookahead prefetch for microprocessors
App 20060149935 - Eickemeyer; Richard James ;   et al.
2006-07-06
Using a modified value GPR to enhance lookahead prefetch
App 20060149934 - Eickemever; Richard James ;   et al.
2006-07-06
Branch lookahead prefetch for microprocessors
App 20060149933 - Eickemeyer; Richard James ;   et al.
2006-07-06

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.

© 2024 USPTO.report | Privacy Policy | Resources | RSS Feed of Trademarks | Trademark Filings Twitter Feed