loadpatents
name:-0.10595607757568
name:-0.11511898040771
name:-0.050388813018799
Thompto; Brian W. Patent Filings

Thompto; Brian W.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Thompto; Brian W..The latest application filed is for "method and system for on demand control of hardware support for software pointer authentification in a computing system".

Company Profile
52.106.125
  • Thompto; Brian W. - Austin TX
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Program counter (PC)-relative load and store addressing for fused instructions
Grant 11,392,386 - Orzol , et al. July 19, 2
2022-07-19
Method And System For On Demand Control Of Hardware Support For Software Pointer Authentification In A Computing System
App 20220188463 - Chatterjee; Debapriya ;   et al.
2022-06-16
Systems And Methods For Dynamic Control Of A Secure Mode Of Operation In A Processor
App 20220188464 - Chatterjee; Debapriya ;   et al.
2022-06-16
Assignment Of Microprocessor Register Tags At Issue Time
App 20220147359 - Battle; Steven J. ;   et al.
2022-05-12
Instruction dispatch routing
Grant 11,327,766 - Schwarz , et al. May 10, 2
2022-05-10
Processor providing intelligent management of values buffered in overlaid architected and non-architected register files
Grant 11,327,757 - Battle , et al. May 10, 2
2022-05-10
Instruction streaming using state migration
Grant 11,301,254 - Battle , et al. April 12, 2
2022-04-12
Mixed precision floating-point multiply-add operation
Grant 11,275,561 - Mueller , et al. March 15, 2
2022-03-15
Instruction Handling For Accumulation Of Register Results In A Microprocessor
App 20220050682 - Thompto; Brian W. ;   et al.
2022-02-17
Program Counter (pc)-relative Load And Store Addressing
App 20220050684 - Orzol; Nicholas R. ;   et al.
2022-02-17
Handling And Fusing Load Instructions In A Processor
App 20220050679 - Lloyd; Bryan ;   et al.
2022-02-17
Handling and fusing load instructions in a processor
Grant 11,249,757 - Lloyd , et al. February 15, 2
2022-02-15
Instruction Dispatch Routing
App 20220035636 - Schwarz; Eric Mark ;   et al.
2022-02-03
Microprocessor That Fuses Load And Compare Instructions
App 20220035634 - Lloyd; Bryan ;   et al.
2022-02-03
On-the-fly Adjustment Of Issue-write Back Latency To Avoid Write Back Collisions Using A Result Buffer
App 20220035637 - Barrick; Brian D. ;   et al.
2022-02-03
Fusion Of Microprocessor Store Instructions
App 20220019436 - Lloyd; Bryan ;   et al.
2022-01-20
Prefetching workloads with dependent pointers
Grant 11,226,817 - Karve , et al. January 18, 2
2022-01-18
Methods And Systems For Translating Virtual Addresses In A Virtual Memory Based System
App 20220012183 - Karve; Mohit ;   et al.
2022-01-13
Compute Array Of A Processor With Mixed-precision Numerical Linear Algebra Support
App 20220004386 - Moreira; Jose E. ;   et al.
2022-01-06
Multiple streams execution for hard-to-predict branches in a microprocessor
Grant 11,188,340 - Thompto , et al. November 30, 2
2021-11-30
Compute array of a processor with mixed-precision numerical linear algebra support
Grant 11,188,328 - Moreira , et al. November 30, 2
2021-11-30
Three-dimensional lane predication for matrix operations
Grant 11,182,458 - Olsson , et al. November 23, 2
2021-11-23
Pairing issue queues for complex instructions and instruction fusion
Grant 11,182,164 - Barrick , et al. November 23, 2
2021-11-23
Processor Providing Intelligent Management Of Values Buffered In Overlaid Architected And Non-architected Register Files
App 20210342150 - Battle; Steven J. ;   et al.
2021-11-04
Prefetch Store Preallocation In An Effective Address-based Cache Directory
App 20210342268 - Lloyd; Bryan ;   et al.
2021-11-04
Methods and systems for translating virtual addresses in a virtual memory based system
Grant 11,163,695 - Karve , et al. November 2, 2
2021-11-02
Fusion to enhance early address generation of load instructions in a microprocessor
Grant 11,163,571 - Barrick , et al. November 2, 2
2021-11-02
Selectively supporting static branch prediction settings only in association with processor-designated types of instructions
Grant 11,163,577 - Levenstein , et al. November 2, 2
2021-11-02
Thread-based organization of slice target register file entry in a microprocessor to permit writing scalar or vector data to portions of a single register file entry
Grant 11,157,276 - Battle , et al. October 26, 2
2021-10-26
Independent mapping of threads
Grant 11,144,323 - Chu , et al. October 12, 2
2021-10-12
Performance benchmark generation
Grant 11,138,089 - Srivatsan , et al. October 5, 2
2021-10-05
Instruction handling for accumulation of register results in a microprocessor
Grant 11,132,198 - Thompto , et al. September 28, 2
2021-09-28
Operation of a multi-slice processor implementing adaptive prefetch control
Grant 11,119,932 - Frey , et al. September 14, 2
2021-09-14
Check pointing of accumulator register results in a microprocessor
Grant 11,119,772 - Battle , et al. September 14, 2
2021-09-14
Slice-target register file for microprocessor
Grant 11,119,774 - Thompto , et al. September 14, 2
2021-09-14
Decoupling of conditional branches
Grant 11,106,466 - Orzol , et al. August 31, 2
2021-08-31
Banked slice-target register file for wide dataflow execution in a microprocessor
Grant 11,093,246 - Boersma , et al. August 17, 2
2021-08-17
Prefetch queue allocation protection bubble in a processor
Grant 11,093,248 - Britto , et al. August 17, 2
2021-08-17
Preventing operand store compare conflicts using conflict address data tables
Grant 11,080,060 - Fatehi , et al. August 3, 2
2021-08-03
Instruction streaming using copy select vector
Grant 11,061,681 - Battle , et al. July 13, 2
2021-07-13
Mixed Precision Floating-point Multiply-add Operation
App 20210182024 - Mueller; Silvia Melitta ;   et al.
2021-06-17
Three-dimensional Lane Predication For Matrix Operations
App 20210182359 - Olsson; Brett ;   et al.
2021-06-17
Compute Array Of A Processor With Mixed-precision Numerical Linear Algebra Support
App 20210182060 - Moreira; Jose E. ;   et al.
2021-06-17
Check Pointing Of Accumulator Register Results In A Microprocessor
App 20210173649 - Battle; Steven J ;   et al.
2021-06-10
Processor Unit For Multiply And Accumulate Operations
App 20210173662 - Leenstra; Jentje ;   et al.
2021-06-10
Methods And Systems For Translating Virtual Addresses In A Virtual Memory Based System
App 20210165743 - Karve; Mohit ;   et al.
2021-06-03
Methods And Systems For Translating Virtual Addresses In A Virtual Memory Based System
App 20210165745 - Karve; Mohit ;   et al.
2021-06-03
Saving and restoring a transaction memory state
Grant 10,996,995 - Battle , et al. May 4, 2
2021-05-04
Program instruction scheduling
Grant 10,983,797 - Zoellin , et al. April 20, 2
2021-04-20
Processor prefetcher mode governor for switching between prefetch modes
Grant 10,963,249 - Karve , et al. March 30, 2
2021-03-30
Thread-based Organization Of Slice Target Register File Entry In A Microprocessor
App 20210072993 - Battle; Steven J. ;   et al.
2021-03-11
Banked Slice-target Register File For Wide Dataflow Execution In A Microprocessor
App 20210072991 - Boersma; Maarten J. ;   et al.
2021-03-11
Slice-target Register File For Microprocessor
App 20210072992 - Thompto; Brian W. ;   et al.
2021-03-11
Fast multi-width instruction issue in parallel slice processor
Grant 10,942,745 - Ayub , et al. March 9, 2
2021-03-09
Instruction Handling For Accumulation Of Register Results In A Microprocessor
App 20210064365 - Thompto; Brian W. ;   et al.
2021-03-04
Instruction chaining
Grant 10,936,321 - Feiste , et al. March 2, 2
2021-03-02
Issue queue snooping for asynchronous flush and restore of distributed history buffer
Grant 10,909,034 - Terry , et al. February 2, 2
2021-02-02
Instruction Streaming Using State Migration
App 20210026642 - Battle; Steven J. ;   et al.
2021-01-28
Instruction Streaming Using Copy Select Vector
App 20210026643 - Battle; Steven J. ;   et al.
2021-01-28
Prefetching Workloads With Dependent Pointers
App 20210011721 - Karve; Mohit ;   et al.
2021-01-14
Issue queue with dynamic shifting between ports
Grant 10,884,753 - Sinharoy , et al. January 5, 2
2021-01-05
Handling unaligned load operations in a multi-slice computer processor
Grant 10,884,742 - Chadha , et al. January 5, 2
2021-01-05
Program Instruction Scheduling
App 20200379766 - Zoellin; Christian ;   et al.
2020-12-03
Multi-section garbage collection
Grant 10,838,857 - Frazier , et al. November 17, 2
2020-11-17
Managing an issue queue for fused instructions and paired instructions in a microprocessor
Grant 10,831,498 - Genden , et al. November 10, 2
2020-11-10
Managing an issue queue for fused instructions and paired instructions in a microprocessor
Grant 10,831,501 - Genden , et al. November 10, 2
2020-11-10
Handling unaligned load operations in a multi-slice computer processor
Grant 10,831,481 - Chadha , et al. November 10, 2
2020-11-10
Resolving operand store compare conflicts
Grant 10,824,430 - Fatehi , et al. November 3, 2
2020-11-03
Resolving Operand Store Compare Conflicts
App 20200341769 - Fatehi; Ehsan ;   et al.
2020-10-29
Resolving Operand Store Compare Conflicts
App 20200341771 - Fatehi; Ehsan ;   et al.
2020-10-29
Multi-section garbage collection method
Grant 10,802,964 - Frazier , et al. October 13, 2
2020-10-13
Saving And Restoring A Transaction Memory State
App 20200301758 - BATTLE; Steven J. ;   et al.
2020-09-24
Cache data replacement in a networked computing system using reference states based on reference attributes
Grant 10,776,275 - Thompto , et al. Sept
2020-09-15
Dual compare of least-significant-bit for dependency wake up from a fused instruction tag in a microprocessor
Grant 10,747,545 - Genden , et al. A
2020-08-18
Operation of a multi-slice processor implementing load-hit-store handling
Grant 10,740,107 - Ayub , et al. A
2020-08-11
Instruction Chaining
App 20200249954 - Kind Code
2020-08-06
Multiple Streams Execution For Branch Predication In A Microprocessor
App 20200201646 - THOMPTO; Brian W. ;   et al.
2020-06-25
Performance Benchmark Generation
App 20200201739 - Srivatsan; Shricharan ;   et al.
2020-06-25
Converting multiple instructions into a single combined instruction with an extension opcode
Grant 10,691,459 - Frazier , et al.
2020-06-23
Converting multiple instructions into a single combined instruction with an extension opcode
Grant 10,684,856 - Frazier , et al.
2020-06-16
Cache line replacement using reference states based on data reference attributes
Grant 10,671,539 - Thompto , et al.
2020-06-02
Dual Compare Of Least-significant-bit For Dependency Wake Up From A Fused Instruction Tag In A Microprocessor
App 20200167166 - Genden; Michael J. ;   et al.
2020-05-28
Selectively Supporting Static Branch Prediction Settings Only In Association With Processor-designated Types Of Instructions
App 20200167163 - Levenstein; Sheldon ;   et al.
2020-05-28
Processor Prefetcher Mode Governor For Switching Between Prefetch Modes
App 20200142698 - Karve; Mohit ;   et al.
2020-05-07
State And Probabilty Based Cache Line Replacement
App 20200117608 - Thompto; Brian W. ;   et al.
2020-04-16
Cache Line Replacement Using Reference States Based On Data Reference Attributes
App 20200117607 - Thompto; Brian W. ;   et al.
2020-04-16
Prefetch Queue Allocation Protection Bubble in a Processor
App 20200081714 - Britto; Vivek ;   et al.
2020-03-12
Independent Mapping Of Threads
App 20200073668 - Chu; Sam G. ;   et al.
2020-03-05
Operation of a multi-slice processor with an expanded merge fetching queue
Grant 10,564,978 - Fernsler , et al. Feb
2020-02-18
Low Power Back-to-back Wake Up And Issue For Paired Issue Queue In A Microprocessor
App 20200042321 - Genden; Michael J. ;   et al.
2020-02-06
Independent mapping of threads
Grant 10,545,762 - Chu , et al. Ja
2020-01-28
Handling Unaligned Load Operations In A Multi-slice Computer Processor
App 20190384602 - CHADHA; SUNDEEP ;   et al.
2019-12-19
Decoupling Of Conditional Branches
App 20190384607 - Orzol; Nicholas R. ;   et al.
2019-12-19
Dynamic Adjustment Of Issue-to-issue Delay Between Dependent Instructions
App 20190377577 - PARK; Dongkook ;   et al.
2019-12-12
Handling unaligned load operations in a multi-slice computer processor
Grant 10,496,406 - Chadha , et al. De
2019-12-03
Multi-section garbage collection
Grant 10,467,135 - Frazier , et al. No
2019-11-05
Broadcasting messages between execution slices for issued instructions indicating when execution results are ready
Grant 10,445,100 - Ayub , et al. Oc
2019-10-15
Operation of a multi-slice processor implementing datapath steering
Grant 10,437,756 - Carlough , et al. O
2019-10-08
Operation Of A Multi-slice Processor Implementing Datapath Steering
App 20190294571 - CARLOUGH; STEVEN R. ;   et al.
2019-09-26
Handling Unaligned Load Operations In A Multi-slice Computer Processor
App 20190286446 - CHADHA; SUNDEEP ;   et al.
2019-09-19
Operation of a multi-slice processor implementing datapath steering
Grant 10,417,152 - Carlough , et al. Sept
2019-09-17
Handling unaligned load operations in a multi-slice computer processor
Grant 10,409,598 - Chadha , et al. Sept
2019-09-10
Managing An Issue Queue For Fused Instructions And Paired Instructions In A Microprocessor
App 20190265978 - GENDEN; MICHAEL J. ;   et al.
2019-08-29
Managing An Issue Queue For Fused Instructions And Paired Instructions In A Microprocessor
App 20190265979 - GENDEN; MICHAEL J. ;   et al.
2019-08-29
Managing an issue queue for fused instructions and paired instructions in a microprocessor
Grant 10,394,565 - Genden , et al. A
2019-08-27
Managing an issue queue for fused instructions and paired instructions in a microprocessor
Grant 10,387,147 - Genden , et al. A
2019-08-20
Dynamic sequential instruction prefetching
Grant 10,379,857 - Eickemeyer , et al. A
2019-08-13
Asynchronous flush and restore of distributed history buffer
Grant 10,379,867 - Terry , et al. A
2019-08-13
Operation Of A Multi-slice Processor Implementing Adaptive Prefetch Control
App 20190213133 - FREY; BRADLY G. ;   et al.
2019-07-11
Operation of a multi-slice processor implementing adaptive prefetch control
Grant 10,331,566 - Frey , et al.
2019-06-25
Asynchronous Flush And Restore Of Distributed History Buffer
App 20190187995 - TERRY; David R. ;   et al.
2019-06-20
Issue Queue Snooping For Asynchronous Flush And Restore Of Distributed History Buffer
App 20190188133 - TERRY; David R. ;   et al.
2019-06-20
Issue Queue With Dynamic Shifting Between Ports
App 20190163486 - Sinharoy; Balaram ;   et al.
2019-05-30
Out-of-order processor and method for back to back instruction issue
Grant 10,235,181 - Thompto
2019-03-19
Extended store forwarding for store misses without cache allocate
Grant 10,223,266 - Cordes , et al.
2019-03-05
Out-of-order processor and method for back to back instruction issue
Grant 10,223,126 - Thompto
2019-03-05
Multi-section garbage collection
Grant 10,223,257 - Frazier , et al.
2019-03-05
Managing An Issue Queue For Fused Instructions And Paired Instructions In A Microprocessor
App 20190042239 - GENDEN; MICHAEL J. ;   et al.
2019-02-07
Managing An Issue Queue For Fused Instructions And Paired Instructions In A Microprocessor
App 20190042238 - GENDEN; MICHAEL J. ;   et al.
2019-02-07
Prefetch performance
Grant 10,191,847 - Drerup , et al. Ja
2019-01-29
Prefetch performance
Grant 10,191,845 - Drerup , et al. Ja
2019-01-29
Fast Multi-width Instruction Issue In Parallel Slice Processor
App 20190026113 - Ayub; Salma ;   et al.
2019-01-24
Converting Program Instructions For Two-stage Processors
App 20190018679 - FRAZIER; GILES R. ;   et al.
2019-01-17
Converting Program Instructions For Two-stage Processors
App 20190018677 - FRAZIER; GILES R. ;   et al.
2019-01-17
Partial ECC mechanism for a byte-write capable register
Grant 10,176,038 - Jeganathan , et al. J
2019-01-08
Out-of-order processor that avoids deadlock in processing queues by designating a most favored instruction
Grant 10,169,046 - Boersma , et al. J
2019-01-01
Multi-section garbage collection
Grant 10,169,228 - Frazier , et al. J
2019-01-01
Dynamic Sequential Instruction Prefetching
App 20180365012 - EICKEMEYER; RICHARD J. ;   et al.
2018-12-20
Prefetch Performance
App 20180341591 - Drerup; Bernard C. ;   et al.
2018-11-29
Prefetch Performance
App 20180341592 - Drerup; Bernard C. ;   et al.
2018-11-29
Fast multi-width instruction issue in parallel slice processor
Grant 10,120,693 - Ayub , et al. November 6, 2
2018-11-06
Handling Unaligned Load Operations In A Multi-slice Computer Processor
App 20180300135 - CHADHA; SUNDEEP ;   et al.
2018-10-18
Handling Unaligned Load Operations In A Multi-slice Computer Processor
App 20180300136 - CHADHA; SUNDEEP ;   et al.
2018-10-18
Operation Of A Multi-slice Processor With An Expanded Merge Fetching Queue
App 20180293077 - FERNSLER; KIMBERLY M. ;   et al.
2018-10-11
Scheme for determining data object usage in a memory region
Grant 10,083,113 - Frazier , et al. September 25, 2
2018-09-25
Techniques for dynamic sequential instruction prefetching
Grant 10,078,514 - Eickemeyer , et al. September 18, 2
2018-09-18
Managing A Divided Load Reorder Queue
App 20180260230 - EICKEMEYER; RICHARD J. ;   et al.
2018-09-13
Scheme for determining data object usage in a memory region
Grant 10,073,770 - Frazier , et al. September 11, 2
2018-09-11
Handling unaligned load operations in a multi-slice computer processor
Grant 10,073,697 - Chadha , et al. September 11, 2
2018-09-11
Handling unaligned load operations in a multi-slice computer processor
Grant 10,067,763 - Chadha , et al. September 4, 2
2018-09-04
Managing a divided load reorder queue
Grant 10,042,647 - Eickemeyer , et al. August 7, 2
2018-08-07
Fast Multi-width Instruction Issue In Parallel Slice Processor
App 20180217843 - Ayub; Salma ;   et al.
2018-08-02
Operation of a multi-slice processor with an expanded merge fetching queue
Grant 10,037,211 - Fernsler , et al. July 31, 2
2018-07-31
Out-of-order Processor And Method For Back To Back Instruction Issue
App 20180196678 - Thompto; Brian W.
2018-07-12
Out-of-order Processor And Method For Back To Back Instruction Issue
App 20180196677 - Thompto; Brian W.
2018-07-12
Fast multi-width instruction issue in parallel slice processor
Grant 9,996,359 - Ayub , et al. June 12, 2
2018-06-12
Operation Of A Multi-slice Processor Implementing Adaptive Prefetch Control
App 20180157602 - FREY; BRADLY G. ;   et al.
2018-06-07
Extended Store Forwarding For Store Misses Without Cache Allocate
App 20180150395 - CORDES; ROBERT A. ;   et al.
2018-05-31
Generating ECC values for byte-write capable registers
Grant 9,985,655 - Jeganathan , et al. May 29, 2
2018-05-29
Generating ECC values for byte-write capable registers
Grant 9,985,656 - Jeganathan , et al. May 29, 2
2018-05-29
Out-of-order Processor That Avoids Deadlock In Processing Queues By Designating A Most Favored Instruction
App 20180121205 - Boersma; Maarten J. ;   et al.
2018-05-03
Multi-Section Garbage Collection
App 20180121349 - Frazier; Giles R. ;   et al.
2018-05-03
Deterministic current based frequency optimization of processor chip
Grant 9,952,651 - Allen-Ware , et al. April 24, 2
2018-04-24
Operation Of A Multi-slice Processor Implementing Instruction Fusion
App 20180107510 - CARLOUGH; STEVEN R. ;   et al.
2018-04-19
Operation of a multi-slice processor implementing simultaneous two-target loads and stores
Grant 9,940,133 - Cordes , et al. April 10, 2
2018-04-10
Multi-section Garbage Collection
App 20180095874 - Frazier; Giles R. ;   et al.
2018-04-05
Operation of a multi-slice processor implementing simultaneous two-target loads and stores
Grant 9,934,033 - Cordes , et al. April 3, 2
2018-04-03
Multi-section garbage collection
Grant 9,916,239 - Frazier , et al. March 13, 2
2018-03-13
Independent Mapping Of Threads
App 20180067746 - Chu; Sam G. ;   et al.
2018-03-08
Independent mapping of threads
Grant 9,870,229 - Chu , et al. January 16, 2
2018-01-16
Managing A Divided Load Reorder Queue
App 20170371658 - EICKEMEYER; RICHARD J. ;   et al.
2017-12-28
Operation Of A Multi-slice Processor Implementing Simultaneous Two-target Loads And Stores
App 20170357508 - CORDES; ROBERT A. ;   et al.
2017-12-14
Operation Of A Multi-slice Processor Implementing Simultaneous Two-target Loads And Stores
App 20170357507 - CORDES; ROBERT A. ;   et al.
2017-12-14
Transmitting Data Between Execution Slices Of A Multi-slice Processor
App 20170357513 - AYUB; SALMA ;   et al.
2017-12-14
Operation Of A Multi-slice Processor Implementing Datapath Steering
App 20170351524 - CARLOUGH; STEVEN R. ;   et al.
2017-12-07
Multi-Section Garbage Collection
App 20170351607 - Frazier; Giles R. ;   et al.
2017-12-07
Operation Of A Multi-slice Processor Implementing Load-hit-store Handling
App 20170351522 - AYUB; SALMA ;   et al.
2017-12-07
Operation Of A Multi-slice Processor Implementing Datapath Steering
App 20170351523 - CARLOUGH; STEVEN R. ;   et al.
2017-12-07
Hazard Avoidance In A Multi-slice Processor
App 20170329607 - EICKEMEYER; RICHARD J. ;   et al.
2017-11-16
Hazard Avoidance In A Multi-slice Processor
App 20170329715 - EICKEMEYER; RICHARD J. ;   et al.
2017-11-16
Techniques For Dynamic Sequential Instruction Prefetching
App 20170329608 - EICKEMEYER; RICHARD J. ;   et al.
2017-11-16
Out-of-order processor that avoids deadlock in processing queues by designating a most favored instruction
Grant 9,798,549 - Boersma , et al. October 24, 2
2017-10-24
Fpscr Sticky Bit Handling For Out Of Order Instruction Execution
App 20170300336 - BARRICK; BRIAN D. ;   et al.
2017-10-19
Fast Multi-width Instruction Issue In Parallel Slice Processor
App 20170293489 - Ayub; Salma ;   et al.
2017-10-12
Deterministic current based frequency optimization of processor chip
Grant 9,778,726 - Allen-Ware , et al. October 3, 2
2017-10-03
Operation Of A Multi-slice Processor With An Expanded Merge Fetching Queue
App 20170277542 - FERNSLER; KIMBERLY M. ;   et al.
2017-09-28
Partial ECC handling for a byte-write capable register
Grant 9,766,975 - Jeganathan , et al. September 19, 2
2017-09-19
Multi-Section Garbage Collection
App 20170255551 - Frazier; Giles R. ;   et al.
2017-09-07
Multi-section garbage collection
Grant 9,734,052 - Frazier , et al. August 15, 2
2017-08-15
Independent mapping of threads
Grant 9,720,696 - Chu , et al. August 1, 2
2017-08-01
Multi-section garbage collection
Grant 9,697,117 - Frazier , et al. July 4, 2
2017-07-04
Handling Unaligned Load Operations In A Multi-slice Computer Processor
App 20170168945 - CHADHA; SUNDEEP ;   et al.
2017-06-15
Handling Unaligned Load Operations In A Multi-slice Computer Processor
App 20170168823 - CHADHA; SUNDEEP ;   et al.
2017-06-15
Method And Apparatus For Writing A Portion Of A Register In A Microprocessor
App 20170109093 - CHU; Sam G. ;   et al.
2017-04-20
Partial Ecc Handling For A Byte-write Capable Register
App 20170060678 - JEGANATHAN; Dhivya ;   et al.
2017-03-02
Generating Ecc Values For Byte-write Capable Registers
App 20170060677 - JEGANATHAN; Dhivya ;   et al.
2017-03-02
Generating Ecc Values For Byte-write Capable Registers
App 20170060679 - JEGANATHAN; Dhivya ;   et al.
2017-03-02
Partial Ecc Mechanism For A Byte-write Capable Register
App 20170063401 - JEGANATHAN; Dhivya ;   et al.
2017-03-02
Multi-section Garbage Collection Method
App 20170031813 - FRAZIER; Giles R. ;   et al.
2017-02-02
Deterministic Current Based Frequency Optimization Of Processor Chip
App 20170031417 - ALLEN-WARE; Malcolm S. ;   et al.
2017-02-02
Multi-section Garbage Collection Method
App 20170031817 - FRAZIER; Giles R. ;   et al.
2017-02-02
Deterministic Current Based Frequency Optimization Of Processor Chip
App 20170031415 - ALLEN-WARE; Malcolm S. ;   et al.
2017-02-02
Scheme For Determining Data Object Usage In A Memory Region
App 20170031814 - FRAZIER; Giles R. ;   et al.
2017-02-02
Scheme For Determining Data Object Usage In A Memory Region
App 20170031812 - FRAZIER; Giles R. ;   et al.
2017-02-02
Multi-Section Garbage Collection
App 20170004072 - Frazier; Giles R. ;   et al.
2017-01-05
Multi-Section Garbage Collection
App 20170004075 - Frazier; Giles R. ;   et al.
2017-01-05
Techniques for increasing vector processing utilization and efficiency through vector lane predication prediction
Grant 9,519,479 - Le , et al. December 13, 2
2016-12-13
Management of shared transactional resources
Grant 9,483,276 - Busaba , et al. November 1, 2
2016-11-01
Predicting and avoiding operand-store-compare hazards in out-of-order microprocessors
Grant 9,430,235 - Alexander , et al. August 30, 2
2016-08-30
Dynamic management of a transaction retry indication
Grant 9,400,657 - Busaba , et al. July 26, 2
2016-07-26
Independent Mapping Of Threads
App 20160092231 - Chu; Sam G. ;   et al.
2016-03-31
Independent Mapping Of Threads
App 20160092276 - Chu; Sam G. ;   et al.
2016-03-31
Management of multiple nested transactions
Grant 9,298,469 - Busaba , et al. March 29, 2
2016-03-29
Verifying processor-sparing functionality in a simulation environment
Grant 9,098,653 - Letz , et al. August 4, 2
2015-08-04
Techniques for Increasing Vector Processing Utilization and Efficiency Through Vector Lane Predication Prediction
App 20150143083 - Le; Hung Q. ;   et al.
2015-05-21
Verifying processor-sparing functionality in a simulation environment
Grant 9,015,025 - Letz , et al. April 21, 2
2015-04-21
Verifying Processor-sparing Functionality In A Simulation Environment
App 20140074451 - Letz; Stefan ;   et al.
2014-03-13
Management Of Multiple Nested Transactions
App 20130339688 - Busaba; Fadi Y. ;   et al.
2013-12-19
Dynamic Management Of A Transaction Retry Indication
App 20130339959 - Busaba; Fadi Y. ;   et al.
2013-12-19
Management Of Shared Transactional Resources
App 20130339975 - Busaba; Fadi Y. ;   et al.
2013-12-19
Predicting And Avoiding Operand-store-compare Hazards In Out-of-order Microprocessors
App 20130318330 - ALEXANDER; Gregory W. ;   et al.
2013-11-28
Predicting and avoiding operand-store-compare hazards in out-of-order microprocessors
Grant 8,521,992 - Alexander , et al. August 27, 2
2013-08-27
Predicting and avoiding operand-store-compare hazards in out-of-order microprocessors
Grant 8,468,325 - Alexander , et al. June 18, 2
2013-06-18
Verifying Processor-Sparing Functionality in a Simulation Environment
App 20130110490 - Letz; Stefan ;   et al.
2013-05-02
Triggering workaround capabilities based on events active in a processor pipeline
Grant 8,082,467 - Alexander , et al. December 20, 2
2011-12-20
Triggering Workaround Capabilities Based On Events Active In A Processor Pipeline
App 20110154107 - ALEXANDER; GREGORY W. ;   et al.
2011-06-23
Predicting And Avoiding Operand-store-compare Hazards In Out-of-order Microprocessors
App 20110153986 - Alexander; Gregory W. ;   et al.
2011-06-23
Predicting And Avoiding Operand-store-compare Hazards In Out-of-order Microprocessors
App 20110154116 - Alexander; Gregory W. ;   et al.
2011-06-23
Error detection enhancement in a microprocessor through the use of a second dependency matrix
Grant 7,549,095 - Alexander , et al. June 16, 2
2009-06-16
Dynamic recalculation of resource vector at issue queue for steering of dependent instructions
Grant 7,395,414 - Le , et al. July 1, 2
2008-07-01
Dynamic Recalculation Of Resource Vector At Issue Queue For Steering Of Dependent Instructions
App 20080133890 - Le; Hung Q. ;   et al.
2008-06-05
Method and apparatus for dynamic modification of microprocessor instruction group at dispatch
App 20060184768 - Bishop; James W. ;   et al.
2006-08-17
Localized generation of global flush requests while guaranteeing forward progress of a processor
App 20060184769 - Floyd; Michael S. ;   et al.
2006-08-17
Method of implementing precise, localized hardware-error workarounds under centralized control
App 20060184770 - Bishop; James W. ;   et al.
2006-08-17
Dynamic recalculation of resource vector at issue queue for steering of dependent instructions
App 20060184767 - Le; Hung Q. ;   et al.
2006-08-17

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