loadpatents
Patent applications and USPTO patent grants for Thompson; David Matthew.The latest application filed is for "multiple-requestor memory access pipeline and arbiter".
Patent | Date |
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Multiple-requestor Memory Access Pipeline And Arbiter App 20220261360 - Chachad; Abhijeet Ashok ;   et al. | 2022-08-18 |
Handling non-correctable errors Grant 11,416,334 - Thompson , et al. August 16, 2 | 2022-08-16 |
Cache Size Change App 20220253382 - CHACHAD; Abhijeet Ashok ;   et al. | 2022-08-11 |
Prefetch Kill And Revival In An Instruction Cache App 20220245069 - Heremagalur Ramaprasad; Bipin Prasad ;   et al. | 2022-08-04 |
Tag Update Bus For Updated Coherence State App 20220237122 - CHACHAD; Abhijeet Ashok ;   et al. | 2022-07-28 |
Global Coherence Operations App 20220229690 - CHACHAD; Abhijeet Ashok ;   et al. | 2022-07-21 |
Aliased mode for cache controller Grant 11,392,498 - Chachad , et al. July 19, 2 | 2022-07-19 |
Error Correcting Codes For Multi-master Memory Controller App 20220164252 - CHACHAD; Abhijeet Ashok ;   et al. | 2022-05-26 |
Merging Data For Write Allocate App 20220164217 - CHACHAD; Abhijeet Ashok ;   et al. | 2022-05-26 |
Cache Coherence Shared State Suppression App 20220164287 - CHACHAD; Abhijeet Ashok ;   et al. | 2022-05-26 |
Pipelined Read-modify-write Operations In Cache Memory App 20220156149 - Chachad; Abhijeet Ashok ;   et al. | 2022-05-19 |
Multiple-requestor memory access pipeline and arbiter Grant 11,321,248 - Chachad , et al. May 3, 2 | 2022-05-03 |
Prefetch kill and revival in an instruction cache Grant 11,314,660 - Heremagalur Ramaprasad , et al. April 26, 2 | 2022-04-26 |
Cache size change Grant 11,314,644 - Chachad , et al. April 26, 2 | 2022-04-26 |
Tag update bus for updated coherence state Grant 11,307,987 - Chachad , et al. April 19, 2 | 2022-04-19 |
Global coherence operations Grant 11,294,707 - Chachad , et al. April 5, 2 | 2022-04-05 |
Hardware Coherence Signaling Protocol App 20220066937 - CHACHAD; Abhijeet Ashok ;   et al. | 2022-03-03 |
Prefetch Management In A Hierarchical Cache System App 20220058127 - Heremagalur Ramaprasad; Bipin Prasad ;   et al. | 2022-02-24 |
Error correcting codes for multi-master memory controller Grant 11,249,842 - Chachad , et al. February 15, 2 | 2022-02-15 |
Cache coherence shared state suppression Grant 11,243,883 - Chachad , et al. February 8, 2 | 2022-02-08 |
Pipelined read-modify-write operations in cache memory Grant 11,237,905 - Chachad , et al. February 1, 2 | 2022-02-01 |
Memory Pipeline Control In A Hierarchical Memory System App 20220027275 - Chachad; Abhijeet Ashok ;   et al. | 2022-01-27 |
Hardware Coherence For Memory Controller App 20210390051 - CHACHAD; Abhijeet Ashok ;   et al. | 2021-12-16 |
Shadow Caches For Level 2 Cache Controller App 20210390050 - CHACHAD; Abhijeet Ashok ;   et al. | 2021-12-16 |
Merging data for write allocate Grant 11,194,617 - Chachad , et al. December 7, 2 | 2021-12-07 |
Aliased Mode For Cache Controller App 20210365374 - CHACHAD; Abhijeet Ashok ;   et al. | 2021-11-25 |
Prefetch management in a hierarchical cache system Grant 11,169,924 - Heremagalur Ramaprasad , et al. November 9, 2 | 2021-11-09 |
Hardware coherence signaling protocol Grant 11,144,456 - Chachad , et al. October 12, 2 | 2021-10-12 |
Memory pipeline control in a hierarchical memory system Grant 11,138,117 - Chachad , et al. October 5, 2 | 2021-10-05 |
Hardware coherence for memory controller Grant 11,106,584 - Chachad , et al. August 31, 2 | 2021-08-31 |
Shadow caches for level 2 cache controller Grant 11,106,583 - Chachad , et al. August 31, 2 | 2021-08-31 |
Multi-level Cache Security App 20200371927 - Chachad; Abhijeet Ashok ;   et al. | 2020-11-26 |
Hardware Coherence For Memory Controller App 20200371930 - CHACHAD; Abhijeet Ashok ;   et al. | 2020-11-26 |
Global Coherence Operations App 20200371926 - CHACHAD; Abhijeet Ashok ;   et al. | 2020-11-26 |
Memory Pipeline Control In A Hierarchical Memory System App 20200371937 - Chachad; Abhijeet Ashok ;   et al. | 2020-11-26 |
Pseudo-random Way Selection App 20200371935 - CHACHAD; Abhijeet Ashok ;   et al. | 2020-11-26 |
Multiple-requestor Memory Access Pipeline And Arbiter App 20200371970 - Chachad; Abhijeet Ashok ;   et al. | 2020-11-26 |
Write Streaming In A Processor App 20200371917 - Chachad; Abhijeet Ashok ;   et al. | 2020-11-26 |
Shadow Caches For Level 2 Cache Controller App 20200371920 - CHACHAD; Abhijeet Ashok ;   et al. | 2020-11-26 |
Controller With Caching And Non-caching Modes App 20200371924 - CHACHAD; Abhijeet Ashok ;   et al. | 2020-11-26 |
Hardware Coherence Signaling Protocol App 20200371934 - CHACHAD; Abhijeet Ashok ;   et al. | 2020-11-26 |
Cache Coherence Shared State Suppression App 20200371931 - CHACHAD; Abhijeet Ashok ;   et al. | 2020-11-26 |
Merging Data For Write Allocate App 20200371925 - CHACHAD; Abhijeet Ashok ;   et al. | 2020-11-26 |
Cache Size Change App 20200371919 - CHACHAD; Abhijeet Ashok ;   et al. | 2020-11-26 |
Parallelized Scrubbing Transactions App 20200371862 - THOMPSON; David Matthew ;   et al. | 2020-11-26 |
Tag Update Bus For Updated Coherence State App 20200371923 - CHACHAD; Abhijeet Ashok ;   et al. | 2020-11-26 |
Error Correcting Codes For Multi-master Memory Controller App 20200371874 - CHACHAD; Abhijeet Ashok ;   et al. | 2020-11-26 |
Pipeline Arbitration App 20200371834 - CHACHAD; Abhijeet Ashok ;   et al. | 2020-11-26 |
Write Control For Read-modify-write Operations In Cache Memory App 20200371918 - Chachad; Abhijeet Ashok ;   et al. | 2020-11-26 |
Pipelined Read-modify-write Operations In Cache Memory App 20200371877 - Chachad; Abhijeet Ashok ;   et al. | 2020-11-26 |
Handling Non-correctable Errors App 20200371875 - THOMPSON; David Matthew ;   et al. | 2020-11-26 |
Prefetch Management In A Hierarchical Cache System App 20200320006 - Heremagalur Ramaprasad; Bipin Prasad ;   et al. | 2020-10-08 |
Prefetch management in a hierarchical cache system Grant 10,642,742 - Heremagalur Ramaprasad , et al. | 2020-05-05 |
Privileged Entity Consensus For Digital Asset Creation App 20200097950 - Thompson; David Matthew | 2020-03-26 |
Prefetch Kill And Revival In An Instruction Cache App 20200089622 - Heremagalur Ramaprasad; Bipin Prasad ;   et al. | 2020-03-19 |
Prefetch Management In A Hierarchical Cache System App 20200057720 - Heremagalur Ramaprasad; Bipin Prasad ;   et al. | 2020-02-20 |
Prefetch kill and revival in an instruction cache Grant 10,489,305 - Heremagalur Ramaprasad , et al. Nov | 2019-11-26 |
Programmable address-based write-through cache control Grant 9,575,901 - Damodaran , et al. February 21, 2 | 2017-02-21 |
Level one data cache line lock and enhanced snoop protocol during cache victims and writebacks to maintain level one data cache and level two cache coherence Grant 9,268,708 - Damodaran , et al. February 23, 2 | 2016-02-23 |
Programmable Address-Based Write-Through Cache Control App 20160034396 - Damodaran; Raguram ;   et al. | 2016-02-04 |
Pair of headphones Grant D737,251 - Thompson , et al. August 25, 2 | 2015-08-25 |
Level One Data Cache Line Lock and Enhanced Snoop Protocol During Cache Victims and Writebacks to Maintain Level One Data Cache and Level Two Cache Coherence App 20150178221 - Damodaran; Raguram ;   et al. | 2015-06-25 |
Non-blocking, pipelined write allocates with allocate data merging in a multi-level cache system Grant 9,009,408 - Chachad , et al. April 14, 2 | 2015-04-14 |
Level one data cache line lock and enhanced snoop protocol during cache victims and writebacks to maintain level one data cache and level two cache coherence Grant 9,003,122 - Damodaran , et al. April 7, 2 | 2015-04-07 |
Pair of headphones Grant D721,354 - Thompson , et al. January 20, 2 | 2015-01-20 |
Pair of headphones Grant D719,548 - Thompson , et al. December 16, 2 | 2014-12-16 |
Pair of headphones Grant D718,745 - Thompson , et al. December 2, 2 | 2014-12-02 |
Pair of headphones Grant D718,744 - Thompson , et al. December 2, 2 | 2014-12-02 |
Pair of earbuds for headphones Grant D718,283 - Thompson , et al. November 25, 2 | 2014-11-25 |
Cache pre-allocation of ways for pipelined allocate requests Grant 8,683,137 - Chachad , et al. March 25, 2 | 2014-03-25 |
Cache Pre-Allocation of Ways for Pipelined Allocate Requests App 20120198171 - Chachad; Abhijeet Ashok ;   et al. | 2012-08-02 |
Non-blocking, Pipelined Write Allocates With Allocate Data Merging In A Multi-level Cache System App 20120198161 - Chachad; Abhijeet Ashok ;   et al. | 2012-08-02 |
Level One Data Cache Line Lock and Enhanced Snoop Protocol During Cache Victims and Writebacks to Maintain Level One Data Cache and Level Two Cache Coherence App 20120198163 - Damodaran; Raguram ;   et al. | 2012-08-02 |
Tableware Grant D662,355 - Tyson , et al. June 26, 2 | 2012-06-26 |
Valve with sensor Grant 8,091,860 - Thompson , et al. January 10, 2 | 2012-01-10 |
Packaging Grant D625,993 - Tyson , et al. October 26, 2 | 2010-10-26 |
Valve with Sensor App 20080264498 - Thompson; David Matthew ;   et al. | 2008-10-30 |
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