Thomas; Olivier

Patent Applications and Registrations

Patent applications and USPTO patent grants for Thomas; Olivier.The latest application filed is for "method for quantifying a sporting activity".

Company Profile

3.48.39

Thomas; Olivier - Revel FR
Thomas; Olivier - Galway IE
Thomas; Olivier - Angers N/A FR
Thomas; Olivier - Herbeys FR
Thomas; Olivier - Grenoble FR
Thomas; Olivier - Leuville Sur Orge FR

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Method for quantifying a sporting activity Grant 11,426,629 - Thomas , et al. August 30, 2	2022-08-30
Method For Quantifying A Sporting Activity App 20200324167 - THOMAS; Olivier ; et al.	2020-10-15
Device and method for writing data to a resistive memory Grant 10,559,355 - Harrand , et al. Feb	2020-02-11
Panicein compounds, compositions and uses thereof Grant 10,376,476 - Mus-Veteau , et al. A	2019-08-13
Panicein Compounds, Compositions And Uses Thereof App 20180200200 - MUS-VETEAU; ISABELLE ; et al.	2018-07-19
Non-volatile resistive memory cell comprising metal electrodes and a solid electrolyte between the metal electrodes Grant 10,002,664 - Vianello , et al. June 19, 2	2018-06-19
Panicein Compounds, Compositions And Uses Thereof App 20170326076 - MUS-VETEAU; ISABELLE ; et al.	2017-11-16
Memory cell with read transistors of the TFET and MOSFET type to reduce leakage current Grant 9,685,222 - Thomas , et al. June 20, 2	2017-06-20
Reconfigurable cam Grant 9,679,649 - Gupta , et al. June 13, 2	2017-06-13
Reconfigurable Cam App 20170133092 - Gupta; Navneet ; et al.	2017-05-11
Memory Cell With Read Transistors Of The Tfet And Mosfettype To Reduce Leakage Current App 20170110179 - THOMAS; Olivier ; et al.	2017-04-20
Device with SRAM memory cells including means for polarizing wells of memory cell transistors Grant 9,542,996 - Thomas , et al. January 10, 2	2017-01-10
Programmable-resistance non-volatile memory Grant 9,508,434 - Benoist , et al. November 29, 2	2016-11-29
Device and method for writing data to a resistive memory Grant 9,449,688 - Thomas , et al. September 20, 2	2016-09-20
Method of preparing lipid nanoparticles Grant 9,302,241 - Benoit , et al. April 5, 2	2016-04-05
Memory Device With Memory Cells Sram (static Random Access Memories) And Controlling The Polarization Of Boxes Of Transistors Of The Memory Cells App 20160078924 - THOMAS; Olivier ; et al.	2016-03-17
Device And Method For Writing Data To A Resistive Memory App 20160071588 - Harrand; Michel ; et al.	2016-03-10
Device And Method For Writing Data To A Resistive Memory App 20160071589 - Thomas; Olivier ; et al.	2016-03-10
Memoire Non Volatile A Resistance Programmable App 20160027509 - BENOIST; Thomas-Medhi ; et al.	2016-01-28
SOI integrated circuit comprising adjacent cells of different types Grant 9,190,334 - Thomas , et al. November 17, 2	2015-11-17
Circuit for reverse biasing inverters for reducing the power consumption of an SRAM memory Grant 9,099,993 - Thomas , et al. August 4, 2	2015-08-04
Integrated circuit using FDSOI technology, with well sharing and means for biasing oppositely doped ground planes present in a same well Grant 9,093,499 - Noel , et al. July 28, 2	2015-07-28
Non-volatile Resistive Memory Cell App 20150078065 - Vianello; Elisa ; et al.	2015-03-19
Self-contained integrated circuit including adjacent cells of different types Grant 8,969,967 - Noel , et al. March 3, 2	2015-03-03
Circuit For Reverse Biasing Inverters For Reducing The Power Consumption Of An Sram Memory App 20140334226 - Thomas; Olivier ; et al.	2014-11-13
Integrated circuit made out of SOI with transistors having distinct threshold voltages Grant 8,723,267 - Thomas , et al. May 13, 2	2014-05-13
Multi-level integrated circuit, device and method for modeling multi-level integrated circuits Grant 8,710,671 - Bobba , et al. April 29, 2	2014-04-29
Self-contained Integrated Circuit Including Adjacent Cells Of Different Types App 20140077300 - Noel; Jean-Philippe ; et al.	2014-03-20
Substrate provided with a semi-conducting area associated with two counter-electrodes and device comprising one such substrate Grant 8,674,443 - Coronel , et al. March 18, 2	2014-03-18
SRAM memory cell provided with transistors having a vertical multichannel structure Grant 8,502,318 - Thomas , et al. August 6, 2	2013-08-06
Integrated Circuit Using Fdsoi Technology, With Well Sharing And Means For Biasing Oppositely Doped Ground Planes Present In A Same Well App 20130089978 - Noel; Jean-Philippe ; et al.	2013-04-11
Method for making asymmetric double-gate transistors Grant 8,399,316 - Vinet , et al. March 19, 2	2013-03-19
Soi Integrated Circuit Comprising Adjacent Cells Of Different Types App 20130065366 - Thomas; Olivier ; et al.	2013-03-14
Compact field effect transistor with counter-electrode and fabrication method Grant 8,368,128 - Fenouillet-Beranger , et al. February 5, 2	2013-02-05
Method for preparing particles from an emulsion in supercritical or liquid CO.sub.2 Grant 8,367,114 - Boury , et al. February 5, 2	2013-02-05
Method for fabricating asymmetric double-gate transistors by which asymmetric and symmetric double-gate transistors can be made on the same substrate Grant 8,324,057 - Vinet , et al. December 4, 2	2012-12-04
SRAM memory cell with double gate transistors provided means to improve the write margin Grant 8,320,198 - Thomas , et al. November 27, 2	2012-11-27
SRAM memory cell with four transistors provided with a counter-electrode Grant 8,314,453 - Thomas , et al. November 20, 2	2012-11-20
Method for making asymmetric double-gate transistors by which asymmetric and symmetric double-gate transistors can be made on the same substrate Grant 8,232,168 - Vinet , et al. July 31, 2	2012-07-31
Multi-level Integrated Circuit, Device And Method For Modeling Multi-level Integrated Circuits App 20120161329 - BOBBA; Shashikanth ; et al.	2012-06-28
Self-contained Integrated Circuit Having Transistors With Separate Threshold Voltages App 20120126333 - Thomas; Olivier ; et al.	2012-05-24
Circuit with transistors integrated in three dimensions and having a dynamically adjustable threshold voltage VT Grant 8,183,630 - Batude , et al. May 22, 2	2012-05-22
Memory cell provided with dual-gate transistors, with independent asymmetric gates Grant 8,116,118 - Thomas , et al. February 14, 2	2012-02-14
Method Of Preparing Lipid Nanoparticles App 20120027825 - Benoit; Jean-Pierre ; et al.	2012-02-02
Method for fabricating asymmetric double-gate transistors by which asymmetric and symmetric double-gate transistors can be made on the same substrate Grant 8,105,906 - Vinet , et al. January 31, 2	2012-01-31
Substrate Provided With A Semi-conducting Area Associated With Two Counter-electrodes And Device Comprising One Such Substrate App 20110316055 - CORONEL; Philippe ; et al.	2011-12-29
Compact Field Effect Transistor With Counter-electrode And Fabrication Method App 20110298019 - FENOUILLET-BERANGER; Claire ; et al.	2011-12-08
Sram Memory Cell With Four Transistors Provided With A Counter-electrode App 20110291199 - THOMAS; Olivier ; et al.	2011-12-01
SRAM memory cell having transistors integrated at several levels and the threshold voltage VT of which is dynamically adjustable Grant 8,013,399 - Thomas , et al. September 6, 2	2011-09-06
Integrated circuit with a power transistor gate bias controlled by the leakage current Grant 7,928,797 - Valentian , et al. April 19, 2	2011-04-19
Method For Fabricating Asymmetric Double-gate Transistors By Which Asymmetric And Symmetric Double-gate Transistors Can Be Made On The Same Substrate App 20100320541 - Vinet; Maud ; et al.	2010-12-23
Method For Making Asymmetric Double-gate Transistors By Which Asymmetric And Symmetric Double-gate Transistors Can Be Made On The Same Substrate App 20100317167 - Vinet; Maud ; et al.	2010-12-16
Sram Memory Cell With Double Gate Transistors Provided With Means To Improve The Write Margin App 20100315889 - Thomas; Olivier ; et al.	2010-12-16
Sram Memory Cell Provided With Transistors Having A Vertical Multichannel Structure App 20100264496 - Thomas; Olivier ; et al.	2010-10-21
Suspended-gate MOS transistor with non-volatile operation Grant 7,812,410 - Collonge , et al. October 12, 2	2010-10-12
SRAM memory with reference bias cell Grant 7,787,286 - Thomas August 31, 2	2010-08-31
Non-volatile SRAM memory cell equipped with mobile gate transistors and piezoelectric operation Grant 7,768,821 - Thomas , et al. August 3, 2	2010-08-03
Method For Making Asymmetric Double-gate Transistors App 20100178743 - Vinet; Maud ; et al.	2010-07-15
Integrated Circuit with a Power Transistor Gate Bias Controlled by the Leakage Current App 20100117720 - Valentian; Alexandre ; et al.	2010-05-13
Method For Fabricating Asymmetric Double-gate Transistors By Which Asymmetric And Symmetric Double-gate Transistors Can Be Made On The Same Substrate App 20100096700 - Vinet; Maud ; et al.	2010-04-22
Circuit With Transistors Integrated In Three Dimensions And Having A Dynamically Adjustable Threshold Voltage Vt App 20090294822 - Batude; Perrine ; et al.	2009-12-03
Sram Memory Cell Having Transistors Integrated At Several Levels And The Threshold Voltage Vt Of Which Is Dynamically Adjustable App 20090294861 - THOMAS; Olivier ; et al.	2009-12-03
Method and device for adapting the voltage of a MOS transistor bulk Grant 7,622,983 - Thomas , et al. November 24, 2	2009-11-24
Method For Preparing Particles From An Emulsion In Supercritical Or Liquid Co2 App 20090087491 - Boury; Frank ; et al.	2009-04-02
Memory cells in double-gate CMOS technology provided with transistors with two independent gates Grant 7,511,989 - Thomas , et al. March 31, 2	2009-03-31
Sram Memory With Reference Bias Cell App 20090080237 - Thomas; Olivier	2009-03-26
Suspended-gate Mos Transistor With Non-volatile Operation App 20090014769 - Collonge; Michael ; et al.	2009-01-15
Non-volatile Sram Memory Cell Equipped With Mobile Gate Transistors And Piezoelectric Operation App 20090016095 - Thomas; Olivier ; et al.	2009-01-15
Use of Glycerol Dipalmitostearate for Improving the Bioavailability of Protein Active Ingredients in Subcutaneous or Intramuscular Injectable Formulations App 20080193545 - Richard; Joel ; et al.	2008-08-14
Memory cell provided with dual-gate transistors, with independent asymmetric gates App 20080175039 - Thomas; Olivier ; et al.	2008-07-24
Method And Device For Adapting The Voltage Of A Mos Transistor Bulk App 20070262809 - Thomas; Olivier ; et al.	2007-11-15
Memory Cells In Double-gate Cmos Technology Provided With Transistors With Two Independent Gates App 20070211519 - THOMAS; Olivier ; et al.	2007-09-13
Method and device for introducing precursors into chamber for chemical vapor deposition Grant 5,945,162 - Senateur , et al. August 31, 1	1999-08-31
Device, especially autonomous and portable for extracting heat from a hot source Grant 5,214,926 - Mandin , et al. June 1, 1	1993-06-01

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