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Method and apparatus for testing a memory device with compressed data using a single output
Grant 7,562,268 - Seyyedy , et al. July 14, 2 | 2009-07-14 |
Double data rate scheme for data output
Grant 7,251,715 - Thomann , et al. July 31, 2 | 2007-07-31 |
Double Data Rate Scheme For Data Output
App 20060198234 - Thomann; Mark R. ; et al. | 2006-09-07 |
Double data rate scheme for data output
Grant 7,093,095 - Thomann , et al. August 15, 2 | 2006-08-15 |
Method and apparatus for testing a memory device with compressed data using a single output
App 20060090108 - Seyyedy; Mirmajid ; et al. | 2006-04-27 |
Method and apparatus for testing a memory device with compressed data using a single output
Grant 6,976,195 - Seyyedy , et al. December 13, 2 | 2005-12-13 |
Delay locked loop control circuit
Grant 6,954,388 - Thomann , et al. October 11, 2 | 2005-10-11 |
Controller for delay locked loop circuits
Grant 6,901,013 - Jones , et al. May 31, 2 | 2005-05-31 |
Delay locked loop control circuit
App 20050024985 - Thomann, Mark R. ; et al. | 2005-02-03 |
Method of reducing standby current during power down mode
Grant 6,836,437 - Li , et al. December 28, 2 | 2004-12-28 |
Delay locked loop control circuit
Grant 6,809,990 - Thomann , et al. October 26, 2 | 2004-10-26 |
Controller for delay locked loop circuits
Grant 6,809,974 - Jones , et al. October 26, 2 | 2004-10-26 |
Read/write timing calibration of a memory array using a row or a redundant row
Grant 6,763,444 - Thomann , et al. July 13, 2 | 2004-07-13 |
Double data rate scheme for data output
App 20040117543 - Thomann, Mark R. ; et al. | 2004-06-17 |
Method of reducing standby current during power down mode
App 20040042282 - Li, Wen ; et al. | 2004-03-04 |
Double data rate scheme for data output
Grant 6,694,416 - Thomann , et al. February 17, 2 | 2004-02-17 |
Delay locked loop control circuit
App 20030235106 - Thomann, Mark R. ; et al. | 2003-12-25 |
Method of reducing standby current during power down mode
Grant 6,665,219 - Li , et al. December 16, 2 | 2003-12-16 |
Controller for delay locked loop circuits
App 20020191462 - Jones, William ; et al. | 2002-12-19 |
Method of characterizing a delay locked loop
App 20020181296 - Jones, William ; et al. | 2002-12-05 |
Method of reducing standby current during power down mode
App 20020181299 - Li, Wen ; et al. | 2002-12-05 |
Shared buffer memory architecture for asynchronous transfer mode switching and multiplexing technology
Grant 6,487,207 - Thomann November 26, 2 | 2002-11-26 |
Read/write timing calibration of a memory array using a row or a redundant row
App 20020169922 - Thomann, Mark R. ; et al. | 2002-11-14 |
Method of reducing standby current during power down mode
Grant 6,438,060 - Li , et al. August 20, 2 | 2002-08-20 |
Method Of Reducing Standby Current During Power Down Mode
App 20020110035 - Li, Wen ; et al. | 2002-08-15 |
Differential input buffer bias circuit
Grant 6,392,453 - Morzano , et al. May 21, 2 | 2002-05-21 |
Memory device having complete row redundancy
Grant 5,815,447 - Thomann September 29, 1 | 1998-09-29 |
Method and apparatus for enhanced booting and DC conditions
Grant 5,783,948 - Thomann , et al. July 21, 1 | 1998-07-21 |
Expandable data width sam for a multiport ram
Grant 5,717,647 - Hush , et al. February 10, 1 | 1998-02-10 |
Video random access memory chip configured to transfer data in response to an internal write signal
Grant 5,703,826 - Hush , et al. December 30, 1 | 1997-12-30 |
Expandable data width SAM for a multiport RAM
Grant 5,657,289 - Hush , et al. August 12, 1 | 1997-08-12 |
Circuit and method for decreasing the cell margin during a test mode
Grant 5,544,108 - Thomann August 6, 1 | 1996-08-06 |
Video random access memory device and method implementing independent two WE nibble control
Grant 5,506,814 - Hush , et al. April 9, 1 | 1996-04-09 |
CMOS bootstrapped output driver method and circuit
Grant 5,128,563 - Hush , et al. July 7, 1 | 1992-07-07 |
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