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Patent applications and USPTO patent grants for Thayer; Larry Jay.The latest application filed is for "memory correction system and method".
Patent | Date |
---|---|
Memory correction system and method Grant 7,599,235 - Thayer October 6, 2 | 2009-10-06 |
Memory correction system and method App 20080065933 - Thayer; Larry Jay | 2008-03-13 |
Memory correction system and method Grant 7,307,902 - Thayer December 11, 2 | 2007-12-11 |
Hierarchical memory correction system and method Grant 7,227,797 - Thayer , et al. June 5, 2 | 2007-06-05 |
Hierarchical memory correction system and method App 20070047344 - Thayer; Larry Jay ;   et al. | 2007-03-01 |
Memory correction system and method App 20070050688 - Thayer; Larry Jay | 2007-03-01 |
System and method for performing BLTs Grant 6,943,804 - Alcorn , et al. September 13, 2 | 2005-09-13 |
Method and apparatus for high speed bus having adjustable, symmetrical, edge-rate controlled, waveforms Grant 6,876,224 - Marshall , et al. April 5, 2 | 2005-04-05 |
System and method for performing BLTs App 20040085322 - Alcorn, Byron A. ;   et al. | 2004-05-06 |
Method and apparatus for high speed bus having adjustable, symmetrical, edge-rate controlled, waveforms App 20040085088 - Marshall, David John ;   et al. | 2004-05-06 |
System and method for preventing memory access errors App 20030226090 - Thayer, Larry Jay | 2003-12-04 |
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