loadpatents
name:-0.034759044647217
name:-0.02820611000061
name:-0.0072400569915771
Tessarolo; Alexander Patent Filings

Tessarolo; Alexander

Patent Applications and Registrations

Patent applications and USPTO patent grants for Tessarolo; Alexander.The latest application filed is for "instruction packing scheme for vliw cpu architecture".

Company Profile
6.28.28
  • Tessarolo; Alexander - Lindfield AU
  • Tessarolo; Alexander - Lindfield NSW AU
  • Tessarolo; Alexander - Sydney N/A AU
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Instruction Packing Scheme For Vliw Cpu Architecture
App 20220214880 - Langadi; Saya Goud ;   et al.
2022-07-07
Transcendental Function Evaluation
App 20210342120 - Viswanathan Pillai; Prasanth ;   et al.
2021-11-04
Transcendental function evaluation
Grant 11,099,815 - Viswanathan Pillai , et al. August 24, 2
2021-08-24
Transcendental Function Evaluation
App 20200394019 - Viswanathan Pillai; Prasanth ;   et al.
2020-12-17
Transcendental function evaluation
Grant 10,725,742 - Viswanathan Pillai , et al.
2020-07-28
Architecture and instruction set to support interruptible floating point division
Grant 10,635,395 - Viswanathan Pillai , et al.
2020-04-28
Architecture and instruction set to support integer division
Grant 10,628,126 - Tessarolo , et al.
2020-04-21
Transcendental Function Evaluation
App 20190369962 - Viswanathan Pillai; Prasanth ;   et al.
2019-12-05
Architecture And Instruction Set To Support Integer Division
App 20190286418 - Tessarolo; Alexander ;   et al.
2019-09-19
Architecture and instruction set to support integer division
Grant 10,359,995 - Tessarolo , et al.
2019-07-23
High resolution capture
Grant 10,177,747 - Tessarolo , et al. J
2019-01-08
Interruptible trigonometric operations
Grant 10,168,992 - Pillai , et al. J
2019-01-01
Architecture And Instruction Set To Support Interruptible Floating Point Division
App 20180004485 - VISWANATHAN PILLAI; Prasanth ;   et al.
2018-01-04
Architecture And Instruction Set To Support Integer Division
App 20170315779 - TESSAROLO; Alexander ;   et al.
2017-11-02
High Resolution Capture
App 20170149418 - Tessarolo; Alexander ;   et al.
2017-05-25
Methods and apparatus to perform serial communications
Grant 9,614,704 - Natarajan , et al. April 4, 2
2017-04-04
Methods And Apparatus To Perform Serial Communications
App 20170033955 - Natarajan; Venkatesh ;   et al.
2017-02-02
Approach for significant improvement of FFT performance in microcontrollers
Grant 9,311,274 - Chowdhury , et al. April 12, 2
2016-04-12
Novel Approach For Significant Improvement Of Fft Performance In Microcontrollers
App 20150113030 - CHOWDHURY; Prohor ;   et al.
2015-04-23
Viterbi butterfly operations
Grant 8,943,392 - Chowdhury , et al. January 27, 2
2015-01-27
Co-hosted cyclical redundancy check calculation
Grant 8,739,012 - Chowdhury , et al. May 27, 2
2014-05-27
Viterbi Butterfly Operations
App 20140129908 - Chowdhury; Prohor ;   et al.
2014-05-08
Processor instructions to accelerate Viterbi decoding
Grant 8,694,878 - Chowdhury , et al. April 8, 2
2014-04-08
Systems and methods for control with a multi-chip module with multiple dies
Grant 8,538,558 - Sabapathy , et al. September 17, 2
2013-09-17
Microcontroller with secure feature for multiple party code development
Grant 8,539,602 - Chowdhury , et al. September 17, 2
2013-09-17
Systems And Methods For Control With A Multi-chip Module With Multiple Dies
App 20130231767 - Sabapathy; Sam Gnana ;   et al.
2013-09-05
High resolution capture
Grant 8,384,440 - Tessarolo , et al. February 26, 2
2013-02-26
Microcontroller with Secure Feature for Multiple Party Code Development
App 20120331560 - Chowdhury; Prohor ;   et al.
2012-12-27
Co-hosted Cyclical Redundancy Check Calculation
App 20120324321 - Chowdhury; Prohor ;   et al.
2012-12-20
Processor Instructions to Accelerate Viterbi Decoding
App 20120324318 - Chowdhury; Prohor ;   et al.
2012-12-20
High Resolution Capture
App 20120319751 - Tessarolo; Alexander ;   et al.
2012-12-20
Processor with summation instruction using overflow counter
Grant 7,590,677 - Tessarolo September 15, 2
2009-09-15
Processor with maximum and minimum instructions
Grant 7,580,967 - Tessarolo , et al. August 25, 2
2009-08-25
Processor with scaled sum-of-product instructions
Grant 7,580,968 - Tessarolo August 25, 2
2009-08-25
Apparatus And Method For Test, Characterization, And Calibration Of Microprocessor-Based And Digital Signal Processor-Based Integrated Circuit Digital Delay Lines
App 20090167317 - Tessarolo; Alexander ;   et al.
2009-07-02
Apparatus and method for test, characterization, and calibration of microprocessor-based and digital signal processor-based integrated circuit digital delay lines
Grant 7,495,429 - Tessarolo , et al. February 24, 2
2009-02-24
Speed of execution of a conditional subtract instruction and increasing the range of operands over which the instruction would be performed correctly
Grant 7,237,000 - Gupte , et al. June 26, 2
2007-06-26
Apparatus and method for test, characterization, and calibration of microprocessor-based and digital signal processor-based integrated circuit digital delay lines
App 20060156150 - Tessarolo; Alexander ;   et al.
2006-07-13
Circular addressing algorithms providing increased compatibility with one or more higher-level programming languages
Grant 7,039,789 - Tessarolo May 2, 2
2006-05-02
Repeat block with zero cycle overhead nesting
Grant 6,986,028 - Ehlig , et al. January 10, 2
2006-01-10
Apparatus and method for synchronized distributed pulse width modulation waveforms in microprocessor and digital signal processing devices
App 20050242858 - Figoli, David A. ;   et al.
2005-11-03
Repeat block with zero cycle overhead nesting
App 20030200423 - Ehlig, Peter N. ;   et al.
2003-10-23
Circular addressing algorithms providing increased compatibility with one or more higher-level programming languages
App 20030172246 - Tessarolo, Alexander
2003-09-11
Calculating a sum of numbers using an overflow counter in an environment exceeded by the numbers in bit-size
App 20030172100 - Tessarolo, Alexander
2003-09-11
Atomically testing and setting or clearing one or more bits stored in a memory location
App 20030172238 - Tessarolo, Alexander ;   et al.
2003-09-11
64-bit scaled sum-of-product operations in a 32-bit environment
App 20030163500 - Tessarolo, Alexander
2003-08-28
Limiting the valve of a 64-bit number to a maximum value, a minimum value, or both in a 32-bit environment
App 20030163499 - Tessarolo, Alexander ;   et al.
2003-08-28
Speed of execution of a conditional subtract instruction and increasing the range of operands over which the instruction would be performed correctly
App 20030037088 - Gupte, Ajit ;   et al.
2003-02-20
Apparatus And Method For Code-enhanced Performance In A Digital Signal Processing Unit
App 20020112144 - TESSAROLO, ALEXANDER ;   et al.
2002-08-15
Apparatus and method for extending register dynamic range
Grant 6,243,731 - Tessarolo June 5, 2
2001-06-05

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