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name:-0.012437105178833
name:-0.012109041213989
name:-0.0017139911651611
Tepolt; Gary B. Patent Filings

Tepolt; Gary B.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Tepolt; Gary B..The latest application filed is for "method and apparatus for forming multi-layered vias in sequentially fabricated circuits".

Company Profile
1.11.9
  • Tepolt; Gary B. - Pelham NH
  • Tepolt; Gary B. - North Pelham NH
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Method and apparatus for forming multi-layered vias in sequentially fabricated circuits
Grant 10,453,787 - Karpman , et al. Oc
2019-10-22
Electronic module subassemblies
Grant 9,693,469 - Tepolt , et al. June 27, 2
2017-06-27
Method And Apparatus For Forming Multi-layered Vias In Sequentially Fabricated Circuits
App 20160343652 - Karpman; Maurice S. ;   et al.
2016-11-24
Electronic modules
Grant 9,425,069 - Racz , et al. August 23, 2
2016-08-23
Electronic Module Subassemblies And Methods For Fabricating The Same
App 20150181709 - Tepolt; Gary B. ;   et al.
2015-06-25
Electronic Modules
App 20130329376 - Racz; Livia M. ;   et al.
2013-12-12
Electronic modules and methods for forming the same
Grant 8,535,984 - Racz , et al. September 17, 2
2013-09-17
Interposers, electronic modules, and methods for forming the same
Grant 8,273,603 - Racz , et al. September 25, 2
2012-09-25
Interposers, Electronic Modules, And Methods For Forming The Same
App 20120086135 - Thompson; Jeffrey C. ;   et al.
2012-04-12
Electronic Modules and Methods for Forming the Same
App 20110309528 - Racz; Livia M. ;   et al.
2011-12-22
Electronic modules and methods for forming the same
Grant 8,017,451 - Racz , et al. September 13, 2
2011-09-13
Removal of integrated circuits from packages
Grant 7,981,698 - Pryputniewicz , et al. July 19, 2
2011-07-19
Die thinning processes and structures
Grant 7,960,247 - Thompson , et al. June 14, 2
2011-06-14
Die Thinning Processes And Structures
App 20090251879 - Thompson; Jeffrey C. ;   et al.
2009-10-08
Electronic Modules and Methods for Forming the Same
App 20090250823 - Racz; Livia M. ;   et al.
2009-10-08
Interposers, Electronic Modules, And Methods For Forming The Same
App 20090250249 - Racz; Livia M. ;   et al.
2009-10-08
Removal of integrated circuits from packages
App 20080217773 - Pryputniewicz; Dariusz R. ;   et al.
2008-09-11
Robotic wafer handler
Grant 5,746,565 - Tepolt May 5, 1
1998-05-05
Process chamber for semiconductor substrates
Grant 5,611,886 - Bachman , et al. March 18, 1
1997-03-18

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