Telecco; Nicola

Patent Applications and Registrations

Patent applications and USPTO patent grants for Telecco; Nicola.The latest application filed is for "novel row redundancy scheme in a multichip integrated memory".

Company Profile

0.12.10

Telecco; Nicola - Mountain View CA
Telecco; Nicola - San Jose CA
Telecco; Nicola - Santa Clara CA
Telecco; Nicola - Monreale IT
Telecco; Nicola - Monleale IT

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Redundancy scheme in memory Grant 7,633,800 - Adusumilli , et al. December 15, 2	2009-12-15
Data register with efficient erase, program verify, and direct bit-line memory access features Grant 7,580,291 - Telecco August 25, 2	2009-08-25
Novel Row Redundancy Scheme In A Multichip Integrated Memory App 20090040825 - Adusumilli; Vijay P. ; et al.	2009-02-12
Nonvolatile semiconductor memory apparatus Grant 7,317,630 - Telecco , et al. January 8, 2	2008-01-08
Data Register With Efficient Erase, Program Verify, And Direct Bit-line Memory Access Features App 20080005416 - Telecco; Nicola	2008-01-03
Dual stage voltage regulation circuit Grant 7,180,276 - Telecco February 20, 2	2007-02-20
Memory architecture with enhanced over-erase tolerant control gate scheme Grant 7,180,779 - Telecco , et al. February 20, 2	2007-02-20
Nonvolatile semiconductor memory apparatus App 20070014140 - Telecco; Nicola ; et al.	2007-01-18
Memory Architecture With Enhanced Over-erase Tolerant Control Gate Scheme App 20070008775 - Telecco; Nicola ; et al.	2007-01-11
Simultaneous external read operation during internal programming in a flash memory device Grant 7,159,069 - Adusumilli , et al. January 2, 2	2007-01-02
Dual stage voltage regulation circuit App 20060186869 - Telecco; Nicola	2006-08-24
Dual stage voltage regulation circuit Grant 7,064,529 - Telecco June 20, 2	2006-06-20
Direct memory access interface in integrated circuits Grant 7,031,211 - Telecco , et al. April 18, 2	2006-04-18
Direct Memory Access Interface In Integrated Circuits App 20060077722 - Telecco; Nicola ; et al.	2006-04-13
Simultaneous external read operation during internal programming in a flash memory device App 20050289314 - Adusumilli, Vijaya P. ; et al.	2005-12-29
Dual stage voltage regulation circuit App 20050057236 - Telecco, Nicola	2005-03-17
Sense amplifier with configurable voltage swing control Grant 6,700,415 - Telecco March 2, 2	2004-03-02
Sense amplifier with configurable voltage swing control App 20030025532 - Telecco, Nicola	2003-02-06
Sense amplifier with improved latching App 20020186051 - Telecco, Nicola	2002-12-12
Reading circuit for multilevel non volatile memory cell devices Grant 5,838,612 - Calligaro , et al. November 17, 1	1998-11-17
Parallel-dichotomic serial sensing method for sensing multiple-level non-volatile memory cells, and sensing circuit for actuating such method Grant 5,729,490 - Calligaro , et al. March 17, 1	1998-03-17
Circuit and method for reading a memory cell that can store multiple bits of data Grant 5,673,221 - Calligaro , et al. September 30, 1	1997-09-30

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