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Patent applications and USPTO patent grants for Tee; Kok Siong.The latest application filed is for "gate array architecture with multiple programmable regions".
Patent | Date |
---|---|
Gate array architecture with multiple programmable regions App 20150048425 - Park; Jonathan C. ;   et al. | 2015-02-19 |
Gate array architecture with multiple programmable regions Grant 8,788,984 - Park , et al. July 22, 2 | 2014-07-22 |
Gate array architecture with multiple programmable regions App 20130334576 - Park; Jonathan C ;   et al. | 2013-12-19 |
Gate array architecture with multiple programmable regions Grant 8,533,641 - Park , et al. September 10, 2 | 2013-09-10 |
Gate Array Architecture With Multiple Programmable Regions App 20130087834 - Park; Jonathan C. ;   et al. | 2013-04-11 |
Hotsocket detection circuitry Grant 7,893,716 - Chui , et al. February 22, 2 | 2011-02-22 |
Low-jitter adjustable level shifter with native devices and kicker Grant 7,180,329 - Sia , et al. February 20, 2 | 2007-02-20 |
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