loadpatents
name:-0.027284145355225
name:-0.015239000320435
name:-0.00059795379638672
Tee; Kheng Chok Patent Filings

Tee; Kheng Chok

Patent Applications and Registrations

Patent applications and USPTO patent grants for Tee; Kheng Chok.The latest application filed is for "programmable active cooling device".

Company Profile
0.20.16
  • Tee; Kheng Chok - Singapore SG
  • Tee; Kheng Chok - Selangor MY
  • Tee; Kheng Chok - Klang MY
  • Tee; Kheng Chok - Christchurch NZ
  • Tee; Kheng Chok - Selanger MY
  • Tee; Kheng Chok - Port Klane MY
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Three-dimensional integrated circuit structures providing thermoelectric cooling and methods for cooling such integrated circuit structures
Grant 9,847,272 - Tan , et al. December 19, 2
2017-12-19
Programmable active cooling device
Grant 9,837,334 - Tee , et al. December 5, 2
2017-12-05
Programmable Active Cooling Device
App 20160293515 - TEE; Kheng Chok ;   et al.
2016-10-06
Integrated circuits with stressed semiconductor-on-insulator (SOI) body contacts and methods for fabricating the same
Grant 9,196,544 - Tee , et al. November 24, 2
2015-11-24
Integrated Circuits With Stressed Semiconductor-on-insulator (soi) Body Contacts And Methods For Fabricating The Same
App 20150262885 - Tee; Kheng Chok ;   et al.
2015-09-17
Three-dimensional Integrated Circuit Structures Providing Thermoelectric Cooling And Methods For Cooling Such Integrated Circuit Structures
App 20150179543 - Tan; Juan Boon ;   et al.
2015-06-25
Structure and method to form source and drain regions over doped depletion regions
Grant 7,888,752 - Chui , et al. February 15, 2
2011-02-15
Wing gate transistor for integrated circuits
Grant 7,528,445 - Phua , et al. May 5, 2
2009-05-05
Method to make corner cross-grid structures in copper metallization
Grant 7,314,811 - Tan , et al. January 1, 2
2008-01-01
Structure and method to form source and drain regions over doped depletion regions
App 20070178652 - Chui; King Jien ;   et al.
2007-08-02
Method of manufacturing a semiconductor device with a strained channel
Grant 7,238,581 - Chui , et al. July 3, 2
2007-07-03
Structure and method to form source and drain regions over doped depletion regions
Grant 7,202,133 - Chui , et al. April 10, 2
2007-04-10
Material architecture for the fabrication of low temperature transistor
Grant 7,169,675 - Tan , et al. January 30, 2
2007-01-30
Method to form a cross network of air gaps within IMD layer
Grant 7,112,866 - Chan , et al. September 26, 2
2006-09-26
Wing Gate Transistor For Integrated Circuits
App 20060180848 - Phua; Timothy ;   et al.
2006-08-17
Device, design and method for a slot in a conductive area
Grant 7,089,522 - Tan , et al. August 8, 2
2006-08-08
Selective oxide trimming to improve metal T-gate transistor
Grant 7,084,025 - Phua , et al. August 1, 2
2006-08-01
Method of forming wing gate transistor for integrated circuits
Grant 7,056,799 - Phua , et al. June 6, 2
2006-06-06
Method of forming a partially depleted silicon on insulator (PDSOI) transistor with a pad lock body extension
Grant 6,998,682 - Chan , et al. February 14, 2
2006-02-14
Method of manufacturing a semiconductor device with a strained channel
App 20060030094 - Chui; King Jien ;   et al.
2006-02-09
Material architecture for the fabrication of low temperature transistor
App 20060006427 - Tan; Chung Foong ;   et al.
2006-01-12
Selective oxide trimming to improve metal T-gate transistor
App 20060008973 - Phua; Timothy Wee Hong ;   et al.
2006-01-12
Wing gate transistor for integrated circuits
App 20050227423 - Phua, Timothy ;   et al.
2005-10-13
Method of forming a partially depleted silicon on insulator (PDSOI) transistor with a pad lock body extension
App 20050208712 - Chan, Yeen Tat ;   et al.
2005-09-22
Novel method to make corner cross-grid structures in copper metallization
App 20050196938 - Tan, Patrick ;   et al.
2005-09-08
Structure and method to form source and drain regions over doped depletion regions
App 20050156253 - Chui, King Jien ;   et al.
2005-07-21
Method of forming a partially depleted silicon on insulator (PDSOI) transistor with a pad lock body extension
Grant 6,905,919 - Chan , et al. June 14, 2
2005-06-14
Method of forming a partially depleted silicon on insulator (PDSOI) transistor with a pad lock body extension
App 20050023608 - Chan, Yeen Tat ;   et al.
2005-02-03
Device, design and method for a slot in a conductive area
App 20040255259 - Tan, Patrick ;   et al.
2004-12-16
Method to form a cross network of air gaps within IMD layer
App 20040175896 - Chan, Lap ;   et al.
2004-09-09
Method to form a cross network of air gaps within IMD layer
Grant 6,730,571 - Chan , et al. May 4, 2
2004-05-04
Method for fabricating void-free epitaxial-CoSi2 with ultra-shallow junctions
Grant 6,410,429 - Ho , et al. June 25, 2
2002-06-25
Low-leakage Dram Structures Using Selective Silicon Epitaxial Growth (seg) On An Insulating Layer
App 20020052077 - Tee, Kheng Chok ;   et al.
2002-05-02
Area array air gap structure for intermetal dielectric application
Grant 6,268,276 - Chan , et al. July 31, 2
2001-07-31
Formation of low k dielectric
Grant 6,150,232 - Chan , et al. November 21, 2
2000-11-21
Passivation of copper interconnect surfaces with a passivating metal layer
Grant 6,100,195 - Chan , et al. August 8, 2
2000-08-08

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