Tavana; Danesh

Patent Applications and Registrations

Patent applications and USPTO patent grants for Tavana; Danesh.The latest application filed is for "systems and methods for accelerating data operations by utilizing dataflow subgraph templates".

Company Profile

2.9.2

Tavana; Danesh - Los Altos CA
Tavana; Danesh - Mountain View CA
Tavana; Danesh - San Jose CA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Systems And Methods For Accelerating Data Operations By Utilizing Dataflow Subgraph Templates App 20200301898 - Samynathan; Balavinayagam ; et al.	2020-09-24
Systems And Methods For Accelerating Data Operations By Utilizing Dataflow Subgraph Templates App 20190392002 - Lavasani; Maysam ; et al.	2019-12-26
Configurable processor system unit Grant 6,467,009 - Winegarden , et al. October 15, 2	2002-10-15
Encryption of configuration stream Grant 6,212,639 - Erickson , et al. April 3, 2	2001-04-03
FPGA architecture with repeatable titles including routing matrices and logic matrices Grant 5,883,525 - Tavana , et al. March 16, 1	1999-03-16
Integrated circuit with field programmable and application specific logic areas Grant 5,825,202 - Tavana , et al. October 20, 1	1998-10-20
Method and circuit for using a function generator of a programmable logic device to implement carry logic functions Grant 5,818,255 - New , et al. October 6, 1	1998-10-06
FPGA architecture with repeatable tiles including routing matrices and logic matrices Grant 5,682,107 - Tavana , et al. October 28, 1	1997-10-28
Read and writable data bus particularly for programmable logic devices Grant 5,635,851 - Tavana June 3, 1	1997-06-03
I/O interface cell for use with optional pad Grant 5,504,439 - Tavana April 2, 1	1996-04-02
Buffered Miller current compensating circuit Grant 4,698,525 - Tavana , et al. October 6, 1	1987-10-06

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