Tasch, Jr.; Al F.
Patent Applications and Registrations
Patent applications and USPTO patent grants for Tasch, Jr.; Al F..The latest application filed is for "high mobility heterojunction transistor and method".
- Tasch, Jr.; Al F. - Austin TX
- Tasch, Jr.; Al F. - Richardson TX
- Tasch, Jr.; Al F. - Dallas TX
| Patent | Date |
|---|---|
| High mobility heterojunction transistor and method Grant 6,319,799 - Ouyang , et al. November 20, 2 | 2001-11-20 |
| Method of making semiconductor having improved interlevel conductor insulation Grant 5,393,690 - Fu , et al. February 28, 1 | 1995-02-28 |
| High density non-charge-sensing DRAM cell Grant 4,763,181 - Tasch, Jr. August 9, 1 | 1988-08-09 |
| Post-metal electron beam programmable MOS read only memory Grant 4,591,891 - Chatterjee , et al. May 27, 1 | 1986-05-27 |
| Self-aligned gate method for making MESFET semiconductor Grant 4,553,316 - Houston , et al. November 19, 1 | 1985-11-19 |
| Self-aligned gate method for making MESFET semiconductor Grant 4,455,738 - Houston , et al. June 26, 1 | 1984-06-26 |
| High performance submicron metal-oxide-semiconductor field effect transistor device structure Grant 4,384,301 - Tasch, Jr. , et al. May 17, 1 | 1983-05-17 |
| Coating device with As.sub.2 -O.sub.3 -SiO.sub.2 Grant 4,355,454 - Tasch, Jr. , et al. October 26, 1 | 1982-10-26 |
| Semiconductor device having improved interlevel conductor insulation Grant 4,356,040 - Fu , et al. October 26, 1 | 1982-10-26 |
| Formation of submicron substrate element Grant 4,354,896 - Hunter , et al. October 19, 1 | 1982-10-19 |
| Post-metal ion implant programmable MOS read only memory Grant 4,268,950 - Chatterjee , et al. May 26, 1 | 1981-05-26 |
| Dual plane well-type two-phase ccd Grant 4,228,445 - Tasch, Jr. , et al. October 14, 1 | 1980-10-14 |
| Dual plane barrier-type two-phase CCD Grant 4,227,202 - Tasch, Jr. , et al. * October 7, 1 | 1980-10-07 |
| Buried storage punch through dynamic ram cell Grant 4,203,125 - Chatterjee , et al. May 13, 1 | 1980-05-13 |
| CCD structures with surface potential asymmetry beneath the phase electrodes Grant 4,167,017 - Tasch, Jr. , et al. September 4, 1 | 1979-09-04 |
| Semiconductor device having a high breakdown voltage junction characteristic Grant 4,153,904 - Tasch, Jr. , et al. May 8, 1 | 1979-05-08 |
| Fabrication methods for the high capacity ram cell Grant 4,112,575 - Fu , et al. September 12, 1 | 1978-09-12 |
| Charge coupled device random access memory Grant 4,060,738 - Tasch, Jr , et al. November 29, 1 | 1977-11-29 |
| Silicon gate ccd structure Grant 4,027,381 - Tasch, Jr. , et al. June 7, 1 | 1977-06-07 |
| Silicon gate CCD structure Grant 4,027,382 - Tasch, Jr. , et al. June 7, 1 | 1977-06-07 |
| Doped oxide buried channel charge-coupled device Grant 4,024,563 - Tasch, Jr. May 17, 1 | 1977-05-17 |
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