Tarroux; Gerard

Patent Applications and Registrations

Patent applications and USPTO patent grants for Tarroux; Gerard.The latest application filed is for "method and system for implementing graphically editable parameterized cells".

Company Profile

2.16.2

Tarroux; Gerard - Villenaeuva-Loubet FR
Tarroux; Gerard - Saint Paul FR
Tarroux; Gerard - Villeneuve-Loubet FR
Tarroux; Gerard - Villenneuve-Loubet FR

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Methods and systems of enabling concurrent editing of hierarchical electronic circuit layouts Grant 10,922,469 - Pei , et al. February 16, 2	2021-02-16
Methods, systems, and computer program product for determining layout equivalence for a multi-fabric electronic design Grant 10,783,312 - Ginetti , et al. Sept	2020-09-22
Editing of layout designs for fixing DRC violations Grant 10,671,793 - Deshpande , et al.	2020-06-02
Methods and systems for enabling concurrent editing of electronic circuit layouts Grant 9,842,183 - Ginetti , et al. December 12, 2	2017-12-12
Circuit design employing stamp patterns Grant 9,773,082 - Morlat , et al. September 26, 2	2017-09-26
System and method for accelerated graphic rendering of design layout having variously sized geometric objects Grant 9,761,204 - Ginetti , et al. September 12, 2	2017-09-12
System and method for identifying an electrical short in an electronic design Grant 9,684,748 - Badel , et al. June 20, 2	2017-06-20
System and method for generating vias in an electronic design by automatically using a hovering cursor indication Grant 9,542,084 - Colancon , et al. January 10, 2	2017-01-10
Methods, systems, and articles of manufacture for implementing clone design components in an electronic design Grant 9,208,273 - Morlat , et al. December 8, 2	2015-12-08
Version management mechanism for fluid guard ring PCells Grant 9,092,586 - Ginetti , et al. July 28, 2	2015-07-28
Method and system for implementing graphically editable parameterized cells Grant 8,527,934 - Ginetti , et al. September 3, 2	2013-09-03
Method And System For Implementing Graphically Editable Parameterized Cells App 20130097572 - Ginetti; Arnold ; et al.	2013-04-18
Method and system for implementing graphically editable parameterized cells Grant 8,347,261 - Ginetti , et al. January 1, 2	2013-01-01
Method And System For Implementing Graphically Editable Parameterized Cells App 20110061034 - GINETTI; Arnold ; et al.	2011-03-10
Method and apparatus for maintaining synchronization between layout clones Grant 7,555,739 - Ginetti , et al. June 30, 2	2009-06-30
Method and system for breaking complex Boolean networks Grant 6,397,370 - Fernandez , et al. May 28, 2	2002-05-28
Automatic synthesis of integrated circuits employing boolean decomposition Grant 5,805,462 - Poirot , et al. September 8, 1	1998-09-08
Integrated circuit fabrication using state machine extraction from behavioral hardware description language Grant 5,537,580 - Giomi , et al. July 16, 1	1996-07-16

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