| Patent | Date |
|---|
Metal layer patterning for minimizing mechanical stress in integrated circuit packages
Grant 11,322,465 - Holland , et al. May 3, 2 | 2022-05-03 |
Metal Layer Patterning For Minimizing Mechanical Stress In Integrated Circuit Packages
App 20210066221 - HOLLAND; Kathryn Rose ; et al. | 2021-03-04 |
Dual device semiconductor structures with shared drain
Grant 10,917,052 - Pan , et al. February 9, 2 | 2021-02-09 |
High density capacitors formed from thin vertical semiconductor structures such as FINFETs
Grant 10,867,994 - Shi , et al. December 15, 2 | 2020-12-15 |
Dual gate metal-oxide-semiconductor field-effect transistor
Grant 10,586,865 - Warrick , et al. | 2020-03-10 |
Dual Device Semiconductor Structures With Shared Drain
App 20190238104 - Pan; Shanjen ; et al. | 2019-08-01 |
Dual device semiconductor structures with shared drain
Grant 10,298,184 - Pan , et al. | 2019-05-21 |
Dual Gate Metal-oxide-semiconductor Field-effect Transistor
App 20190103490 - WARRICK; Scott ; et al. | 2019-04-04 |
Correction for speaker monitoring
Grant 10,123,143 - Parupalli , et al. November 6, 2 | 2018-11-06 |
Sense resistor surroundingly positioned near or around and integrated with an output connection
Grant 10,020,357 - Woodford , et al. July 10, 2 | 2018-07-10 |
High Density Capacitors Formed From Thin Vertical Semiconductor Structures Such As Finfets
App 20180190648 - Shi; Zhonghai ; et al. | 2018-07-05 |
Correction For Speaker Monitoring
App 20180091911 - Parupalli; Vamsikrishna ; et al. | 2018-03-29 |
High density capacitors formed from thin vertical semiconductor structures such as FinFETs
Grant 9,929,147 - Shi , et al. March 27, 2 | 2018-03-27 |
Fully depleted region for reduced parasitic capacitance between a poly-silicon layer and a substrate region
Grant 9,919,913 - Pan , et al. March 20, 2 | 2018-03-20 |
Pinched doped well for a junction field effect transistor (JFET) isolated from the substrate
Grant 9,853,103 - Pan , et al. December 26, 2 | 2017-12-26 |
Pinched Doped Well For A Junction Field Effect Transistor (jfet) Isolated From The Substrate
App 20170294512 - Pan; Shanjen ; et al. | 2017-10-12 |
Dual Device Semiconductor Structures With Shared Drain
App 20170272042 - Pan; Shanjen ; et al. | 2017-09-21 |
High Density Capacitors Formed From Thin Vertical Semiconductor Structures Such As Finfets
App 20160329321 - Shi; Zhonghai ; et al. | 2016-11-10 |
Sense Resistor Surroundingly Positioned Near Or Around And Integrated With An Output Connection
App 20160322455 - Woodford; Scott Allan ; et al. | 2016-11-03 |
Fully Depleted Region For Reduced Parasitic Capacitance Between A Poly-silicon Layer And A Substrate Region
App 20160145093 - Pan; Shanjen ; et al. | 2016-05-26 |
Formation of electrical components on a semiconductor substrate by polishing to isolate the components
Grant 9,275,992 - Tarabbia , et al. March 1, 2 | 2016-03-01 |
Contact power rail
Grant 8,946,914 - Stephens , et al. February 3, 2 | 2015-02-03 |
14 Lpm Contact Power Rail
App 20140246791 - STEPHENS; Jason Eugene ; et al. | 2014-09-04 |
Trench silicide mask generation using designated trench transfer and trench block regions
Grant 8,775,980 - Salama , et al. July 8, 2 | 2014-07-08 |
Trench Silicide Mask Generation Using Designated Trench Transfer And Trench Block Regions
App 20140149952 - SALAMA; Mohamed ; et al. | 2014-05-29 |
Linear capacitor structure in a CMOS process
Grant 6,351,020 - Tarabbia , et al. February 26, 2 | 2002-02-26 |
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