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Patent applications and USPTO patent grants for Tangoda; Atsushi.The latest application filed is for "ad converter and ad conversion method".
Patent | Date |
---|---|
Ad converter and ad conversion method Grant 9,912,347 - Takada , et al. March 6, 2 | 2018-03-06 |
Ad Converter And Ad Conversion Method App 20170257111 - TAKADA; Hiroki ;   et al. | 2017-09-07 |
AD converter and AD conversion method Grant 9,692,441 - Takada , et al. June 27, 2 | 2017-06-27 |
Ad Converter And Ad Conversion Method App 20170005668 - TAKADA; Hiroki ;   et al. | 2017-01-05 |
Integrated circuit architecture for testing variable delay circuit Grant 8,395,406 - Iwashita , et al. March 12, 2 | 2013-03-12 |
Delay locked loop circuit and signal delay method App 20110032014 - Shihara; Masahiko ;   et al. | 2011-02-10 |
Integrated circuit architecture for testing variable delay circuit App 20100052698 - Iwashita; Tooru ;   et al. | 2010-03-04 |
Delay locked loop circuit Grant 7,583,118 - Hasegawa , et al. September 1, 2 | 2009-09-01 |
Delay locked loop circuit App 20070096784 - Hasegawa; Atsushi ;   et al. | 2007-05-03 |
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