Tang; Sanh

Patent Applications and Registrations

Patent applications and USPTO patent grants for Tang; Sanh.The latest application filed is for "semiconductor memory device having coplanar digit line contacts and storage node contacts in memory array and method for fabricating the same".

Company Profile

0.11.9

Tang; Sanh - Kuna ID
Tang; Sanh - Boise ID

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Methods for fabricating a semiconductor memory device Grant 10,163,909 - Wang , et al. Dec	2018-12-25
Semiconductor Memory Device Having Coplanar Digit Line Contacts And Storage Node Contacts In Memory Array And Method For Fabricating The Same App 20180102366 - Wang; Kuo-Chen ; et al.	2018-04-12
Semiconductor memory device having coplanar digit line contacts and storage node contacts in memory array and method for fabricating the same Grant 9,881,924 - Wang , et al. January 30, 2	2018-01-30
Semiconductor Memory Device Having Coplanar Digit Line Contacts And Storage Node Contacts In Memory Array And Method For Fabricating The Same App 20170330882 - Wang; Kuo-Chen ; et al.	2017-11-16
Methods of forming a plurality of conductive lines in the fabrication of integrated circuitry, methods of forming an array of conductive lines, and integrated circuitry Grant 9,064,935 - Tang , et al. June 23, 2	2015-06-23
Methods Of Forming A Plurality Of Conductive Lines In The Fabrication Of Integrated Circuitry, Methods Of Forming An Array Of Conductive Lines, And Integrated Circuitry App 20110266689 - Tang; Sanh ; et al.	2011-11-03
Methods of forming a plurality of conductive lines in the fabrication of integrated circuitry, methods of forming an array of conductive lines, and integrated circuitry Grant 7,989,336 - Tang , et al. August 2, 2	2011-08-02
Flash memory with partially removed blocking dielectric in the wordline direction App 20110147827 - Simsek-Ege; Fatma Arzum ; et al.	2011-06-23
Flash Memory Having a Floating Gate in the Shape of a Curved Section App 20110133266 - Tang; Sanh ; et al.	2011-06-09
Methods Of Forming A Plurality Of Conductive Lines In The Fabrication Of Integrated Circuitry, Methods Of Forming An Array Of Conductive Lines, And Integrated Circuitry App 20100283155 - Tang; Sanh ; et al.	2010-11-11
Method To Create SOI Layer For 3D-Stacking Memory Array App 20100187660 - Tang; Sanh ; et al.	2010-07-29
Recessed Channel Select Gate For A Memory Device App 20090242961 - Tang; Sanh ; et al.	2009-10-01
Method of forming a low resistance contact to underlying aluminum interconnect by depositing titanium in a via opening and reacting the titanium with the aluminum Grant 6,759,324 - Rhodes , et al. July 6, 2	2004-07-06
Metal contact and process App 20030100180 - Rhodes, Howard E. ; et al.	2003-05-29
Method of forming dynamic random access memory circuitry and dynamic random access memory Grant 6,437,369 - Tang August 20, 2	2002-08-20
Metal contact and process Grant 6,274,486 - Rhodes , et al. August 14, 2	2001-08-14
Titanium nitride interconnects Grant 6,160,296 - Violette , et al. December 12, 2	2000-12-12
Method of forming dynamic random access memory circuitry and dynamic random access memory Grant 5,977,578 - Tang November 2, 1	1999-11-02
Methods for use in formation of titanium nitride interconnects and interconnects formed using same Grant 5,945,350 - Violette , et al. August 31, 1	1999-08-31

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