| Patent | Date |
|---|
Advanced Lithography And Self-assembled Devices
App 20220262722 - SCHENKER; Richard E. ; et al. | 2022-08-18 |
Advanced lithography and self-assembled devices
Grant 11,373,950 - Schenker , et al. June 28, 2 | 2022-06-28 |
Thin Film Transistors Having A Backside Channel Contact For High Density Memory
App 20220199628 - SATO; Noriyuki ; et al. | 2022-06-23 |
Fabrication Of Thin Film Fin Transistor Structure
App 20220199807 - SATO; Noriyuki ; et al. | 2022-06-23 |
Pattern Decomposition Lithography Techniques
App 20210375807 - WALLACE; Charles H. ; et al. | 2021-12-02 |
Memory Architecture With Shared Bitline At Back-end-of-line
App 20210305255 - ALZATE VINASCO; Juan G. ; et al. | 2021-09-30 |
Pattern decomposition lithography techniques
Grant 11,107,786 - Wallace , et al. August 31, 2 | 2021-08-31 |
Advanced Lithography And Self-assembled Devices
App 20210082800 - SCHENKER; Richard E. ; et al. | 2021-03-18 |
Advanced lithography and self-assembled devices
Grant 10,892,223 - Schenker , et al. January 12, 2 | 2021-01-12 |
Vertical Edge Blocking (veb) Technique For Increasing Patterning Process Margin
App 20200388530 - GULER; Leonard P. ; et al. | 2020-12-10 |
Preformed interlayer connections for integrated circuit devices
Grant 10,811,351 - Tan October 20, 2 | 2020-10-20 |
Self-aligned isotropic etch of pre-formed vias and plugs for back end of line (BEOL) interconnects
Grant 10,600,678 - Wallace , et al. | 2020-03-24 |
Pattern Decomposition Lithography Techniques
App 20200091101 - WALLACE; CHARLES H. ; et al. | 2020-03-19 |
Colored Self-aligned Subtractive Patterning
App 20200066521 - LIN; Kevin ; et al. | 2020-02-27 |
Advanced Lithography And Self-assembled Devices
App 20200066629 - SCHENKER; Richard E. ; et al. | 2020-02-27 |
Pattern decomposition lithography techniques
Grant 10,490,519 - Wallace , et al. Nov | 2019-11-26 |
Preformed Interlayer Connections For Integrated Circuit Devices
App 20190295943 - TAN; Elliot N. | 2019-09-26 |
Pattern decomposition lithography techniques
Grant 10,409,152 - Wallace , et al. Sept | 2019-09-10 |
Self-aligned Isotropic Etch Of Pre-formed Vias And Plugs For Back End Of Line (beol) Interconnects
App 20190148220 - WALLACE; Charles H. ; et al. | 2019-05-16 |
Self-aligned isotropic etch of pre-formed vias and plugs for back end of line (BEOL) interconnects
Grant 10,211,088 - Wallace , et al. Feb | 2019-02-19 |
Previous layer self-aligned via and plug patterning for back end of line (BEOL) interconnects
Grant 10,204,830 - Wallace , et al. Feb | 2019-02-12 |
Self-aligned Isotropic Etch Of Pre-formed Vias And Plugs For Back End Of Line (beol) Interconnects
App 20180204763 - WALLACE; Charles H. ; et al. | 2018-07-19 |
Apparatus And Method For Fabricating A High Density Memory Array
App 20180123038 - LEE; Kevin J. ; et al. | 2018-05-03 |
Previous Layer Self-aligned Via And Plug Patterning For Back End Of Line (beol) Interconnects
App 20180033692 - WALLACE; Charles H. ; et al. | 2018-02-01 |
Previous layer self-aligned via and plug patterning for back end of line (BEOL) interconnects
Grant 9,793,159 - Wallace , et al. October 17, 2 | 2017-10-17 |
Pattern Decomposition Lithography Techniques
App 20170207185 - WALLACE; CHARLES H. ; et al. | 2017-07-20 |
Method and structure to contact tight pitch conductive layers with guided vias
Grant 9,659,860 - Schenker , et al. May 23, 2 | 2017-05-23 |
Pattern Decomposition Lithography Techniques
App 20170139318 - WALLACE; CHARLES H. ; et al. | 2017-05-18 |
Pattern decomposition lithography techniques
Grant 9,558,947 - Wallace , et al. January 31, 2 | 2017-01-31 |
Previous Layer Self-Aligned Via and Plug Patterning for Back End of Line (BEOL)Interconnects
App 20160190009 - WALLACE; CHARLES H. ; et al. | 2016-06-30 |
Methods for forming interconnect layers having tight pitch interconnect structures
Grant 9,379,010 - Jezewski , et al. June 28, 2 | 2016-06-28 |
Method And Structure To Contact Tight Pitch Conductive Layers With Guided Vias
App 20160148869 - SCHENKER; Richard E. ; et al. | 2016-05-26 |
Methods For Forming Interconnect Layers Having Tight Pitch Interconnect Structures
App 20150214094 - Jezewski; Christopher J. ; et al. | 2015-07-30 |
Spacer assisted pitch division lithography
Grant 8,860,184 - Sivakumar , et al. October 14, 2 | 2014-10-14 |
Spacer Assisted Pitch Division Lithography
App 20140191372 - Sivakumar; Swaminathan ; et al. | 2014-07-10 |
Pattern Decomposition Lithography Techniques
App 20140117488 - Wallace; Charles H. ; et al. | 2014-05-01 |
Feature size reduction
Grant 8,314,034 - Tan , et al. November 20, 2 | 2012-11-20 |
Feature Size Reduction
App 20120164837 - Tan; Elliot N. ; et al. | 2012-06-28 |
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