TAN; Chung Kwang
Patent Applications and Registrations
Patent applications and USPTO patent grants for TAN; Chung Kwang.The latest application filed is for "via structures having tapered profiles for embedded interconnect bridge substrates".
- TAN; Chung Kwang - Chandler AZ
| Patent | Date |
|---|---|
| Via Structures Having Tapered Profiles For Embedded Interconnect Bridge Substrates App 20220285278 - ECTON; Jeremy D. ; et al. | 2022-09-08 |
| Via structures having tapered profiles for embedded interconnect bridge substrates Grant 11,373,951 - Ecton , et al. June 28, 2 | 2022-06-28 |
| Dual-damascene zero-misalignment-via process for semiconductor packaging Grant 11,264,307 - Aleksov , et al. March 1, 2 | 2022-03-01 |
| Dual-damascene Zero-misalignment-via Process For Semiconductor Packaging App 20190355647 - ALEKSOV; Aleksandar ; et al. | 2019-11-21 |
| Via Structures Having Tapered Profiles For Embedded Interconnect Bridge Substrates App 20190304912 - Ecton; Jeremy D. ; et al. | 2019-10-03 |
| Dual-damascene zero-misalignment-via process for semiconductor packaging Grant 10,403,564 - Aleksov , et al. Sep | 2019-09-03 |
| Dual-damascene Zero-misalignment-via Process For Semiconductor Packaging App 20190206767 - ALEKSOV; Aleksandar ; et al. | 2019-07-04 |
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