loadpatents
name:-0.012769937515259
name:-0.010569095611572
name:-0.0047929286956787
Tan; Chee Voon Patent Filings

Tan; Chee Voon

Patent Applications and Registrations

Patent applications and USPTO patent grants for Tan; Chee Voon.The latest application filed is for "semiconductor package with lead tip inspection feature".

Company Profile
4.9.11
  • Tan; Chee Voon - Seremban MY
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Double-sided cooled molded semiconductor package
Grant 11,302,613 - Chiang , et al. April 12, 2
2022-04-12
Power semiconductor package and method for fabricating a power semiconductor package
Grant 11,211,356 - Lim , et al. December 28, 2
2021-12-28
Semiconductor Package with Lead Tip Inspection Feature
App 20210366732 - Chiang; Chau Fatt ;   et al.
2021-11-25
Semiconductor Package And Method For Fabricating The Same
App 20210313294 - Chiang; Chau Fatt ;   et al.
2021-10-07
Power Semiconductor Package and Method for Fabricating a Power Semiconductor Package
App 20210057375 - Lim; Wee Aun Jason ;   et al.
2021-02-25
Molded Semiconductor Package with Double-Sided Cooling
App 20210020547 - Chiang; Chau Fatt ;   et al.
2021-01-21
Double-Sided Cooled Molded Semiconductor Package
App 20210020550 - Chiang; Chau Fatt ;   et al.
2021-01-21
Molded semiconductor package with double-sided cooling
Grant 10,886,199 - Chiang , et al. January 5, 2
2021-01-05
Clip Frame Assembly, Semiconductor Package Having a Lead Frame and a Clip Frame, and Method of Manufacture
App 20200273790 - Tay; Bun Kian ;   et al.
2020-08-27
Semiconductor chip package having contact pins at short side edges
Grant 10,037,934 - Otremba , et al. July 31, 2
2018-07-31
Semiconductor packages and methods of formation thereof
Grant 9,478,484 - Otremba , et al. October 25, 2
2016-10-25
Semiconductor Chip Package Having Contact Pins at Short Side Edges
App 20160233149 - Otremba; Ralf ;   et al.
2016-08-11
Semiconductor device having multiple chips mounted to a carrier
Grant 9,263,421 - Lee , et al. February 16, 2
2016-02-16
Semiconductor Device Having Multiple Chips Mounted to a Carrier
App 20150249067 - Lee; Boon Seong ;   et al.
2015-09-03
Electronic array and chip package
Grant 9,111,772 - Strutz , et al. August 18, 2
2015-08-18
Electronic Array And Chip Package
App 20150214297 - Strutz; Volker ;   et al.
2015-07-30
Semiconductor Packages and Methods of Formation Thereof
App 20140110828 - Otremba; Ralf ;   et al.
2014-04-24
Semiconductor device with protruding component portion and method of packaging
Grant 8,664,753 - Lee , et al. March 4, 2
2014-03-04
Semiconductor Device With Protruding Component Portion And Method Of Packaging
App 20110121439 - Lee; Teck Sim ;   et al.
2011-05-26

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.

© 2024 USPTO.report | Privacy Policy | Resources | RSS Feed of Trademarks | Trademark Filings Twitter Feed