TAKEYAMA; Hiroji

Patent Applications and Registrations

Patent applications and USPTO patent grants for TAKEYAMA; Hiroji.The latest application filed is for "logical description difference extracting method, logical design aiding apparatus, and non-transitory computer-readable storage medium thereof".

Company Profile

0.5.9

TAKEYAMA; Hiroji - Kawasaki JP

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Logical Description Difference Extracting Method, Logical Design Aiding Apparatus, And Non-transitory Computer-readable Storage Medium Thereof App 20110307849 - TAKEYAMA; Hiroji ; et al.	2011-12-15
Logical equivalence verifying device, method, and computer-readable medium thereof Grant 7,337,414 - Maruyama , et al. February 26, 2	2008-02-26
Apparatus and method for creating function verification description, and computer-readable recording medium in which program for creating function verification description is recorded App 20070028203 - Sato; Mitsuru ; et al.	2007-02-01
Logical equivalence verifying device, method and computer readable medium thereof Grant 7,143,375 - Maruyama , et al. November 28, 2	2006-11-28
Logical equivalence verifying device, logical equivalence verifying method, and logical equivalence verifying program App 20060184903 - Maruyama; Terunobu ; et al.	2006-08-17
Method and apparatus for verifying logical equivalency between logic circuits Grant 7,086,016 - Matsuzaki , et al. August 1, 2	2006-08-01
Apparatus and method for circuit diagram display, and computer product App 20060047451 - Sato; Mituru ; et al.	2006-03-02
Logical equivalence verifying device, logical equivalence verifying method, and logical equivalence verifying program App 20040098683 - Maruyama, Terunobu ; et al.	2004-05-20
Circuit designing apparatus, circuit designing method and timing distribution apparatus Grant 6,678,871 - Takeyama , et al. January 13, 2	2004-01-13
Method and apparatus for verifying logical equivalency between logic circuits App 20030237065 - Matsuzaki, Kazuhiro ; et al.	2003-12-25
Circuit designing apparatus, circuit designing method and timing distribution apparatus Grant 6,618,834 - Takeyama , et al. September 9, 2	2003-09-09
Automated HDL modifying apparatus and computer-readable recording medium in which program for automatically modifying HDL is recorded App 20030033595 - Takagi, Miki ; et al.	2003-02-13
Circuit designing apparatus, circuit designing method and timing distribution apparatus App 20030009727 - Takeyama, Hiroji ; et al.	2003-01-09
Circuit designing apparatus, circuit designing method and timing distribution apparatus App 20020083398 - Takeyama, Hiroji ; et al.	2002-06-27

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