Takeshima; Toshio

Patent Applications and Registrations

Patent applications and USPTO patent grants for Takeshima; Toshio.The latest application filed is for "semiconductor integrated circuit test method and semiconductor integrated circuit".

Company Profile

0.12.5

Takeshima; Toshio - Kanagawa JP
Takeshima; Toshio - Nakahara-ku JP
Takeshima; Toshio - Tokyo JP

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Semiconductor Integrated Circuit Test Method And Semiconductor Integrated Circuit App 20110128806 - Takeshima; Toshio	2011-06-02
Semiconductor Integrated Circuit And Method Of Testing Same App 20090094494 - Takeshima; Toshio	2009-04-09
Semiconductor integrated circuit including fuse circuit and method of manufacturing the same Grant 7,489,536 - Kawashima , et al. February 10, 2	2009-02-10
Semiconductor integrated circuit including fuse circuit and method of manufacturing the same App 20070127284 - Kawashima; Hidekazu ; et al.	2007-06-07
EBV-infected stomach cancer cell line Grant 7,176,020 - Tajima , et al. February 13, 2	2007-02-13
EBV-infected stomach cancer cell line App 20030092084 - Tajima, Masako ; et al.	2003-05-15
EBV-infected stomach cancer cell line App 20010044148 - Tajima, Masako ; et al.	2001-11-22
Method of programming a multilevel nonvolatile memory cell with reduced number of erase operations Grant 6,064,597 - Takeshima , et al. May 16, 2	2000-05-16
Booster circuit Grant 6,008,690 - Takeshima , et al. December 28, 1	1999-12-28
Non-volatile semiconductor memory device having a memory cell capable of establishing multi-level information and data writing method thereof Grant 5,970,012 - Takeshima October 19, 1	1999-10-19
Method of restoring data in non-volatile semiconductor memory Grant 5,969,993 - Takeshima October 19, 1	1999-10-19
Nonvolatile semiconductor memory having memory cells each storing multi-bits information Grant 5,894,436 - Ohkawa , et al. April 13, 1	1999-04-13
Voltage booster circuit Grant 5,812,018 - Sudo , et al. September 22, 1	1998-09-22
Non-volatile semiconductor memory capable of writing multi-value information Grant 5,796,652 - Takeshima , et al. August 18, 1	1998-08-18
Programming which can make threshold voltages of programmed memory cells have a narrow distribution in a nonvolatile semiconductor memory Grant 5,757,699 - Takeshima , et al. May 26, 1	1998-05-26
Dynamic random access memory device having a parallel testing mode for producing arbitrary test pattern Grant 5,436,910 - Takeshima , et al. July 25, 1	1995-07-25
Dynamic random access memory device having a plurality of one-transistor type memory cells Grant 4,737,829 - Morimoto , et al. April 12, 1	1988-04-12

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.