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Patent applications and USPTO patent grants for Takemoto; Toyoki.The latest application filed is for "method of making semiconductor ic including polar transistors".
Patent | Date |
---|---|
Method of making semiconductor IC including polar transistors Grant 5,066,602 - Takemoto , et al. November 19, 1 | 1991-11-19 |
Method of making bipolar transistors Grant 4,826,780 - Takemoto , et al. May 2, 1 | 1989-05-02 |
Method of manufacturing a semiconductor integrated circuit device Grant 4,814,287 - Takemoto , et al. March 21, 1 | 1989-03-21 |
Method of manufacturing isolated semiconductor devices Grant 4,685,198 - Kawakita , et al. August 11, 1 | 1987-08-11 |
Method of forming isolated island regions in a semiconductor substrate by selective etching and oxidation and devices formed therefrom Grant 4,615,746 - Kawakita , et al. October 7, 1 | 1986-10-07 |
Method for manufacturing a semiconductor device Grant 4,563,227 - Sakai , et al. January 7, 1 | 1986-01-07 |
Analog-digital converter with linear characteristic restoration circuit Grant 4,496,935 - Inoue , et al. January 29, 1 | 1985-01-29 |
Oxide walled emitter Grant 4,484,211 - Takemoto , et al. November 20, 1 | 1984-11-20 |
Fully parallel threshold type analog-to-digital converter Grant 4,417,233 - Inoue , et al. November 22, 1 | 1983-11-22 |
Method of making integrated circuits Grant 3,945,347 - Takemoto , et al. March 23, 1 | 1976-03-23 |
MOS type semiconductor IC device Grant 3,911,289 - Takemoto October 7, 1 | 1975-10-07 |
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