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Patent applications and USPTO patent grants for Takeishi; Naoei.The latest application filed is for "semiconductor device with smoothed pad portion".
Patent | Date |
---|---|
Semiconductor device with parallel interconnects Grant 7,372,164 - Hino , et al. May 13, 2 | 2008-05-13 |
Semiconductor device with smoothed pad portion App 20050156250 - Hino, Yoshinori ;   et al. | 2005-07-21 |
Semiconductor device with smoothed pad portion Grant 6,873,053 - Hino , et al. March 29, 2 | 2005-03-29 |
Semiconductor device and pattern layout method thereof Grant 6,849,947 - Hino , et al. February 1, 2 | 2005-02-01 |
Pattern layout method of semiconductor device Grant 6,820,246 - Hino , et al. November 16, 2 | 2004-11-16 |
Semiconductor device Grant 6,742,169 - Haraguchi , et al. May 25, 2 | 2004-05-25 |
Semiconductor device and pattern layout method thereof App 20020125474 - Hino, Yoshinori ;   et al. | 2002-09-12 |
Semiconductor device and manufacturing method thereof App 20020125512 - Hino, Yoshinori ;   et al. | 2002-09-12 |
Semiconductor device App 20020119614 - Haraguchi, Yoshitaka ;   et al. | 2002-08-29 |
Pattern layout method of semiconductor device App 20020120911 - Hino, Yoshinori ;   et al. | 2002-08-29 |
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