loadpatents
name:-0.033101081848145
name:-0.028131008148193
name:-0.0067000389099121
Takeguchi; Naoki Patent Filings

Takeguchi; Naoki

Patent Applications and Registrations

Patent applications and USPTO patent grants for Takeguchi; Naoki.The latest application filed is for "fluorine-free tungsten deposition process employing in-situ oxidation and apparatuses for effecting the same".

Company Profile
6.28.27
  • Takeguchi; Naoki - Nagoya JP
  • Takeguchi; Naoki - Osaka JP
  • Takeguchi; Naoki - Yokkaichi JP
  • Takeguchi; Naoki - Aichiken JP
  • Takeguchi; Naoki - Aizuwakamatsu JP
  • Takeguchi; Naoki - Fukushima-Ken JP
  • Takeguchi; Naoki - Aizuwakamatsu-shi JP
  • Takeguchi; Naoki - Kawasaki JP
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Fluorine-free tungsten deposition process employing in-situ oxidation and apparatuses for effecting the same
Grant 11,377,733 - Zhou , et al. July 5, 2
2022-07-05
Fluorine-free Tungsten Deposition Process Employing In-situ Oxidation And Apparatuses For Effecting The Same
App 20220042171 - ZHOU; Fei ;   et al.
2022-02-10
Three-dimensional memory device including electrically conductive layers with molybdenum-containing liners
Grant 10,916,504 - Mukae , et al. February 9, 2
2021-02-09
Three-dimensional Memory Device Including Electrically Conductive Layers With Molybdenum-containing Liners
App 20200395310 - MUKAE; Yusuke ;   et al.
2020-12-17
LED lighting device and luminaire
Grant 10,616,984 - Takeguchi , et al.
2020-04-07
Three-dimensional memory device containing replacement contact via structures and method of making the same
Grant 10,608,010 - Terasawa , et al.
2020-03-31
Led Lighting Device And Luminaire
App 20190364627 - TAKEGUCHI; Naoki ;   et al.
2019-11-28
Three-dimensional Memory Device Containing Replacement Contact Via Structures And Method Of Making The Same
App 20190280001 - TERASAWA; Yujin ;   et al.
2019-09-12
Selective tungsten growth for word lines of a three-dimensional memory device
Grant 10,381,372 - Amano , et al. A
2019-08-13
Cobalt-containing conductive layers for control gate electrodes in a memory structure
Grant 10,128,261 - Makala , et al. November 13, 2
2018-11-13
Method of fabricating memory array having divided apart bit lines and partially divided bit line selector switches
Grant 9,887,240 - Shimabukuro , et al. February 6, 2
2018-02-06
Selective Tungsten Growth For Word Lines Of A Three-dimensional Memory Device
App 20180019256 - AMANO; Fumitaka ;   et al.
2018-01-18
Vertical thin film transistors in non-volatile storage systems
Grant 9,818,798 - Takeguchi , et al. November 14, 2
2017-11-14
Cobalt-containing Conductive Layers For Control Gate Electrodes In A Memory Structure
App 20170287925 - MAKALA; Raghuveer S. ;   et al.
2017-10-05
Single Chamber Multi-partition Deposition Tool And Method Of Operating Same
App 20170247794 - MUKAE; Yusuke ;   et al.
2017-08-31
Set of stepped surfaces formation for a multilevel interconnect structure
Grant 9,728,499 - Shimabukuro , et al. August 8, 2
2017-08-08
Method Of Fabricating Memory Array Having Divided Apart Bit Lines And Partially Divided Bit Line Selector Switches
App 20170154925 - Shimabukuro; Seiji ;   et al.
2017-06-01
Method of operating memory array having divided apart bit lines and partially divided bit line selector switches
Grant 9,608,043 - Shimabukuro , et al. March 28, 2
2017-03-28
Blocking oxide in memory opening integration scheme for three-dimensional memory structure
Grant 9,601,508 - Sel , et al. March 21, 2
2017-03-21
Blocking Oxide In Memory Opening Integration Scheme For Three-dimensional Memory Structure
App 20160315095 - Sel; Jongsun ;   et al.
2016-10-27
Vertical Thin Film Transistors In Non-Volatile Storage Systems
App 20160284765 - Takeguchi; Naoki ;   et al.
2016-09-29
Method Of Operating Memory Array Having Divided Apart Bit Lines And Partially Divided Bit Line Selector Switches
App 20160268340 - Shimabukuro; Seiji ;   et al.
2016-09-15
Transistor gate and process for making transistor gate
Grant 9,401,279 - Takeguchi July 26, 2
2016-07-26
Vertical thin film transistors in non-volatile storage systems
Grant 9,362,338 - Takeguchi , et al. June 7, 2
2016-06-07
Memory array having divided apart bit lines and partially divided bit line selector switches
Grant 9,356,074 - Shimabukuro , et al. May 31, 2
2016-05-31
Set Of Stepped Surfaces Formation For A Multilevel Interconnect Structure
App 20160148835 - SHIMABUKURO; Seiji ;   et al.
2016-05-26
Memory Array Having Divided Apart Bit Lines And Partially Divided Bit Line Selector Switches
App 20160141337 - Shimabukuro; Sejei ;   et al.
2016-05-19
Air gap formation between bit lines with side protection
Grant 9,337,085 - Sel , et al. May 10, 2
2016-05-10
Electroplating apparatus and method with uniformity improvement
Grant 9,334,578 - Takeguchi May 10, 2
2016-05-10
Air gap formation between bit lines with top protection
Grant 9,330,969 - Sel , et al. May 3, 2
2016-05-03
Ultraviolet blocking structure and method for semiconductor device
Grant 9,281,384 - Takeguchi March 8, 2
2016-03-08
Three dimensional memory device having comb-shaped source electrode and methods of making thereof
Grant 9,230,984 - Takeguchi January 5, 2
2016-01-05
Floating gate ultrahigh density vertical NAND flash memory
Grant 9,159,739 - Makala , et al. October 13, 2
2015-10-13
Vertical Thin Film Transistors In Non-Volatile Storage Systems
App 20150249112 - Takeguchi; Naoki ;   et al.
2015-09-03
Air Gap Formation Between Bit Lines with Top Protection
App 20150228532 - Sel; Jong Sun ;   et al.
2015-08-13
Air Gap Formation Between Bit Lines with Side Protection
App 20150228582 - Sel; Jong Sun ;   et al.
2015-08-13
Cobalt-containing Conductive Layers For Control Gate Electrodes In A Memory Structure
App 20150179662 - MAKALA; Raghuveer S. ;   et al.
2015-06-25
Transistor Gate And Process For Making Transistor Gate
App 20140367804 - Takeguchi; Naoki
2014-12-18
Floating Gate Ultrahigh Density Vertical Nand Flash Memory And Method Of Making Thereof
App 20140353738 - Makala; Raghuveer S. ;   et al.
2014-12-04
Method for forming metal wire
Grant 8,835,248 - Takeguchi September 16, 2
2014-09-16
Methods and structures for discharging plasma formed during the fabrication of semiconductor device
Grant 8,749,012 - Higashi , et al. June 10, 2
2014-06-10
Method For Forming Metal Wire
App 20130316531 - Takeguchi; Naoki
2013-11-28
Plasma treated metal silicide layer formation
Grant 7,902,056 - Enda , et al. March 8, 2
2011-03-08
Electroplating Apparatus And Method With Uniformity Improvement
App 20100122908 - Takeguchi; Naoki
2010-05-20
Ultraviolet Blocking Structure And Method For Semiconductor Device
App 20090174041 - TAKEGUCHI; Naoki
2009-07-09
Plasma Treated Metal Silicide Layer Formation
App 20090053867 - ENDA; Takayuki ;   et al.
2009-02-26
Methods and structures for discharging plasma formed during the fabrication of semiconuctor device
App 20090026570 - Higashi; Masahiko ;   et al.
2009-01-29
Semiconductor device and fabrication method therefor
App 20060281242 - Takeguchi; Naoki ;   et al.
2006-12-14
Magnetic thin film, magnetic thin film forming method, and recording head
Grant 6,822,831 - Ikeda , et al. November 23, 2
2004-11-23
Magnetic thin film, magnetic thin film forming method, and recording head
App 20020129875 - Ikeda, Shoji ;   et al.
2002-09-19

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.

© 2024 USPTO.report | Privacy Policy | Resources | RSS Feed of Trademarks | Trademark Filings Twitter Feed