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System and Method for Offsetting The Data Buffer Latency of a Device Implementing a JEDEC Standard DDR-4 LRDIMM Chipset App 20150294698 - Takefman; Michael L. ;   et al. | 2015-10-15 |
System and method of interfacing co-processors and input/output devices via a main memory system Grant 8,972,805 - Takefman , et al. March 3, 2 | 2015-03-03 |
System And Method For Providing An Address Cache For Memory Map Learning App 20140237157 - Takefman; Michael L. ;   et al. | 2014-08-21 |
System And Method For Providing A Command Buffer In A Memory System App 20140237205 - Takefman; Michael L. ;   et al. | 2014-08-21 |
System and Method of Interfacing Co-Processors and Input/Output Devices via a Main Memory System App 20140223262 - Takefman; Michael L. ;   et al. | 2014-08-07 |
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