loadpatents
name:-0.028883934020996
name:-0.025850057601929
name:-0.00052118301391602
Takamatsuya; Yoshihiro Patent Filings

Takamatsuya; Yoshihiro

Patent Applications and Registrations

Patent applications and USPTO patent grants for Takamatsuya; Yoshihiro.The latest application filed is for "portable terminal and input control method".

Company Profile
0.10.7
  • Takamatsuya; Yoshihiro - Kawasaki N/A JP
  • Takamatsuya; Yoshihiro - Yokohama JP
  • Takamatsuya, Yoshihiro - Kawasaki-shi JP
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Portable terminal and input control method
Grant 9,000,956 - Goto , et al. April 7, 2
2015-04-07
Information processing apparatus and input control method
Grant 8,446,382 - Goto , et al. May 21, 2
2013-05-21
Portable Terminal And Input Control Method
App 20110193727 - Goto; Masayuki ;   et al.
2011-08-11
Information processing apparatus and input control method
App 20110074721 - Goto; Masayuki ;   et al.
2011-03-31
Access-request control method, driver program for communication device, and communication device
Grant 7,448,069 - Takamatsuya November 4, 2
2008-11-04
Data transfer apparatus
Grant 7,447,976 - Takamatsuya November 4, 2
2008-11-04
Protocol conversion apparatus, communication apparatus, communication program storage medium, and communication system
Grant 7,349,407 - Takamatsuya , et al. March 25, 2
2008-03-25
Data transfer apparatus
App 20060224936 - Takamatsuya; Yoshihiro
2006-10-05
Access-request control method, driver program for communication device, and communication device
App 20050144461 - Takamatsuya, Yoshihiro
2005-06-30
Device and host machine
App 20040267973 - Sumida, Masahiko ;   et al.
2004-12-30
CPU controlled memory controlling device for accessing operational information
Grant 6,643,730 - Okumura , et al. November 4, 2
2003-11-04
Memory card
Grant 6,418,501 - Gama , et al. July 9, 2
2002-07-09
Memory unit and buffer access control circuit for updating an address when consecutively accessing upper and lower buffers
App 20020032830 - Gama, Shinkichi ;   et al.
2002-03-14
Generation of chip-enable signal appropriate for employed chip configuration
App 20020026555 - Okumura, Yoshiki ;   et al.
2002-02-28
Method and apparatus for controlling data erase operations of a non-volatile memory device
Grant 6,154,808 - Nagase , et al. November 28, 2
2000-11-28

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