| Patent | Date |
|---|
Surround gate vertical field effect transistors including tubular and strip electrodes and method of making the same
Grant 10,707,314 - Takaki , et al. | 2020-07-07 |
Vertical thin film transistors with isolation
Grant 10,541,273 - Takaki Ja | 2020-01-21 |
Vertical Thin Film Transistors With Isolation
App 20190165044 - Takaki; Seje | 2019-05-30 |
Resistive random access memory device containing replacement word lines and method of making thereof
Grant 10,283,710 - Kikuchi , et al. | 2019-05-07 |
Surround Gate Vertical Field Effect Transistors Including Tubular And Strip Electrodes And Method Of Making The Same
App 20190103467 - TAKAKI; Seje ; et al. | 2019-04-04 |
Resistive Random Access Memory Device Containing Replacement Word Lines And Method Of Making Thereof
App 20190074441 - KIKUCHI; Shin ; et al. | 2019-03-07 |
Two-dimensional Array Of Surround Gate Vertical Field Effect Transistors And Method Of Making Thereof
App 20190051703 - SEL; Jongsun ; et al. | 2019-02-14 |
Vertical field effect transisitors having a rectangular surround gate and method of making the same
Grant 10,115,895 - Takaki , et al. October 30, 2 | 2018-10-30 |
Three-dimensional resistive random access memory containing self-aligned memory elements
Grant 10,096,654 - Kikuchi , et al. October 9, 2 | 2018-10-09 |
Vertical thin film transistors with surround gates
Grant 9,754,999 - Takaki , et al. September 5, 2 | 2017-09-05 |
Floating staircase word lines and process in a 3D non-volatile memory having vertical bit lines
Grant 9,748,172 - Takaki August 29, 2 | 2017-08-29 |
Parallel bit line three-dimensional resistive random access memory
Grant 9,698,202 - Takaki July 4, 2 | 2017-07-04 |
Vertical thin film transistors with surround gates
Grant 9,673,257 - Takaki , et al. June 6, 2 | 2017-06-06 |
Floating Staircase Word Lines And Process In A 3d Non-volatile Memory Having Vertical Bit Lines
App 20170154845 - Takaki; Seje | 2017-06-01 |
Monolithic three dimensional memory arrays formed using sacrificial polysilicon pillars
Grant 9,646,880 - Takaki , et al. May 9, 2 | 2017-05-09 |
Self-selecting local bit line for a three-dimensional memory array
Grant 9,613,689 - Takaki April 4, 2 | 2017-04-04 |
Three-dimensional Resistive Random Access Memory Containing Self-aligned Memory Elements
App 20170077184 - KIKUCHI; Shin ; et al. | 2017-03-16 |
Floating staircase word lines and process in a 3D non-volatile memory having vertical bit lines
Grant 9,595,566 - Takaki March 14, 2 | 2017-03-14 |
Word line connection for memory device and method of making thereof
Grant 9,583,539 - Takaki February 28, 2 | 2017-02-28 |
Monolithic three dimensional memory arrays with staggered vertical bit line select transistors and methods therfor
Grant 9,530,824 - Takaki , et al. December 27, 2 | 2016-12-27 |
Multilevel contact to a 3D memory array and method of making thereof
Grant 9,515,023 - Tobitsuka , et al. December 6, 2 | 2016-12-06 |
Multilevel contact to a 3D memory array and method of making thereof
Grant 9,449,924 - Takaki September 20, 2 | 2016-09-20 |
Parallel Bit Line Three-dimensional Resistive Random Access Memory
App 20160260775 - TAKAKI; Seje | 2016-09-08 |
Floating Staircase Word Lines and Process in a 3D Non-Volatile Memory Having Vertical Bit Lines
App 20160247859 - Takaki; Seje | 2016-08-25 |
Memory device with comb-shaped electrode having a plurality of electrode fingers and method of making thereof
Grant 9,419,058 - Takaki , et al. August 16, 2 | 2016-08-16 |
Memory Device With Comb- Shaped Electrode Having A Plurality Of Electrode Fingers And Method Of Making Thereof
App 20160233270 - TAKAKI; Seje ; et al. | 2016-08-11 |
Monolithic Three Dimensional Memory Arrays With Staggered Vertical Bit Line Select Transistors And Methods Therfor
App 20160141334 - Takaki; Seje ; et al. | 2016-05-19 |
Dual channel vertical field effect transistor including an embedded electrode
Grant 9,343,507 - Takaki May 17, 2 | 2016-05-17 |
Transistor device with gate bottom isolation and method of making thereof
Grant 9,331,088 - Takaki May 3, 2 | 2016-05-03 |
Word Line Connection For Memory Device And Method Of Making Thereof
App 20160056210 - TAKAKI; Seje | 2016-02-25 |
Trench multilevel contact to a 3D memory array and method of making thereof
Grant 9,230,905 - Takaki , et al. January 5, 2 | 2016-01-05 |
Transistor Device With Gate Bottom Isolation And Method Of Making Thereof
App 20150279850 - Takaki; Seje | 2015-10-01 |
Transistor Device And Method Of Making Thereof
App 20150263074 - Takaki; Seje | 2015-09-17 |
Trench Multilevel Contact to a 3D Memory Array and Method of Making Thereof
App 20150194380 - Takaki; Seje ; et al. | 2015-07-09 |
Multilevel Contact To A 3d Memory Array And Method Of Making Thereof
App 20150179577 - TOBITSUKA; Toshihide ; et al. | 2015-06-25 |
Multilevel Contact To A 3d Memory Array And Method Of Making Thereof
App 20150179659 - Takaki; Seje | 2015-06-25 |
Manufacturing Method Of Semiconductor Device
App 20120107970 - TAKAKI; Seje | 2012-05-03 |
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