loadpatents
Patent applications and USPTO patent grants for Takacs; Dezso.The latest application filed is for "memory cell with trench transistor".
Patent | Date |
---|---|
Memory cell with trench transistor Grant 6,661,053 - Willer , et al. December 9, 2 | 2003-12-09 |
Memory cell with trench transistor App 20030111687 - Willer, Josef ;   et al. | 2003-06-19 |
Integrated circuit in complementary circuit technology comprising a substrate bias voltage generator Grant 5,045,716 - Takacs , et al. September 3, 1 | 1991-09-03 |
Method of making very short channel length MNOS and MOS devices by double implantation of one conductivity type subsequent to other type implantation Grant 4,342,149 - Jacobs , et al. August 3, 1 | 1982-08-03 |
uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.
While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.
All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.