Taiwan Semiconductor Manufacturing Corp

Patent Applications and Registrations

Patent applications and USPTO patent grants for Taiwan Semiconductor Manufacturing Corp.The latest application filed is for "system and method for inspecting errors on a wafer".

Company Profile

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Taiwan Semiconductor Manufacturing Corp - Hsin-Chu Taiwan CN
Taiwan Semiconductor Manufacturing Corp. - Hsinchu TW
Taiwan Semiconductor Manufacturing Corporation - Hsinchu TW
Taiwan Semiconductor Manufacturing Corp - Hsinchu TW

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
System and method for inspecting errors on a wafer Grant 7,469,057 - Hung , et al. December 23, 2	2008-12-23
Method of fabricating reduced critical dimension for conductive line and space Grant 6,399,286 - Liu , et al. June 4, 2	2002-06-04
High speed built-in self-test circuit for DRAMS Grant 6,351,837 - Huang , et al. February 26, 2	2002-02-26
Internal offset-canceled phase locked loop-based deskew buffer Grant 6,346,838 - Hwang , et al. February 12, 2	2002-02-12
Method for programming and reading 2-bit p-channel ETOX-cells with non-connecting HSG islands as floating gate Grant 6,288,943 - Chi September 11, 2	2001-09-11
Transistor and logic circuit of thin silicon-on-insulator wafers based on gate induced drain leakage currents Grant 6,281,550 - Chi August 28, 2	2001-08-28
Single polysilicon DRAM cell and array with current gain Grant 6,262,447 - Chi July 17, 2	2001-07-17
Split gate flash memory cell Grant 6,232,180 - Chen May 15, 2	2001-05-15
Electrostatic discharge protection device with resistive drain structure Grant 6,215,156 - Yang April 10, 2	2001-04-10
Multi-level flash memory using triple well process and method of making Grant 6,207,507 - Wang March 27, 2	2001-03-27
Flash memory cell using p+/N-well diode with double poly floating gate Grant 6,181,601 - Chi January 30, 2	2001-01-30
Method for forming flash memory of ETOX-cell programmed by band-to-band tunneling induced substrate hot electron and read by gate induced drain leakage current Grant 6,143,607 - Chi November 7, 2	2000-11-07
CMOS inverter using gate induced drain leakage current Grant 6,144,075 - Chi November 7, 2	2000-11-07
NOR array architecture and operation methods for ETOX cells capable of full EEPROM functions Grant 6,133,604 - Chi October 17, 2	2000-10-17

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