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Patent applications and USPTO patent grants for TAIWAN SEMICONDUCTOR MANUFACTURING COMPNAY, LTD..The latest application filed is for "method and system for fixing violation of layout".
Patent | Date |
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Method And System For Fixing Violation Of Layout App 20220147691 - CHUANG; Yi-Lin ;   et al. | 2022-05-12 |
Multiply Spin-Coated Ultra-Thick Hybrid Hard Mask for Sub 60nm MRAM Devices App 20190259938 - Yang; Yi ;   et al. | 2019-08-22 |
Trace Design for Bump-on-Trace (BOT) Assembly App 20170186723 - Lin; Yen-Liang ;   et al. | 2017-06-29 |
Etching Process App 20160099151 - Yeh; Ming-Hsi ;   et al. | 2016-04-07 |
Methods of patterning small via pitch dimensions Grant 9,099,530 - Lin , et al. August 4, 2 | 2015-08-04 |
Method Of Making Backside Illuminated Image Sensors App 20150111334 - HUANG; Kuan-Chieh ;   et al. | 2015-04-23 |
Conflict Detection For Self-aligned Multiple Patterning Compliance App 20140208282 - Hsu; Chin-Chang ;   et al. | 2014-07-24 |
Method of fabricating hybrid impact-ionization semiconductor device Grant 8,680,619 - Zhu , et al. March 25, 2 | 2014-03-25 |
Etching method for extending i-line photolithography to 0.25 micron linewidth Grant 5,837,428 - Huang , et al. November 17, 1 | 1998-11-17 |
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