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Tailliet; Fran.cedilla.ois Patent Filings

Tailliet; Fran.cedilla.ois

Patent Applications and Registrations

Patent applications and USPTO patent grants for Tailliet; Fran.cedilla.ois.The latest application filed is for "eeprom memory protected against the effects from a breakdown of an access transistor".

Company Profile
0.13.0
  • Tailliet; Fran.cedilla.ois - Epinay sur Seine FR
  • Tailliet; Fran.cedilla.ois - Le Tholonet FR
  • Tailliet; Fran.cedilla.ois - Seine FR
  • Tailliet; Fran.cedilla.ois - Epinary sur Seine FR
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
EEPROM memory protected against the effects from a breakdown of an access transistor
Grant 6,934,192 - Tailliet , et al. August 23, 2
2005-08-23
Method and system for the adjustment of an internal timing signal or a corresponding reference in an integrated circuit, and corresponding integrated circuit
Grant 6,898,538 - Tailliet May 24, 2
2005-05-24
Threshold amplifier
Grant 6,549,048 - Tailliet April 15, 2
2003-04-15
Bus system with a reduced number of lines
Grant 6,523,121 - Bahout , et al. February 18, 2
2003-02-18
Device and method for power-on/power-off checking of an integrated circuit
Grant 6,281,723 - Tailliet August 28, 2
2001-08-28
Physical fuse for semiconductor integrated circuit
Grant 5,969,403 - Fournel , et al. October 19, 1
1999-10-19
Method for protecting an integrated circuit against electro-static discharges
Grant 5,903,424 - Tailliet May 11, 1
1999-05-11
Bus system with a reduced number of lines
Grant 5,812,802 - Bahout , et al. September 22, 1
1998-09-22
Method and apparatus for the protection of non-volatile memory zones
Grant 5,812,446 - Tailliet September 22, 1
1998-09-22
High voltage generator
Grant 5,801,577 - Tailliet September 1, 1
1998-09-01
Method for the anticipated reading of serial access memory, and memory pertaining thereto
Grant 5,663,922 - Tailliet September 2, 1
1997-09-02
Method for the testing of integrated circuit chips and corresponding integrated circuit device
Grant 5,608,335 - Tailliet March 4, 1
1997-03-04
Dynamic redundancy circuit for memory in integrated circuit form
Grant 5,604,702 - Tailliet February 18, 1
1997-02-18

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