loadpatents
Patent applications and USPTO patent grants for Tai; Chun-Hui.The latest application filed is for "integrated circuit design using dfm-enhanced architecture".
Patent | Date |
---|---|
Voltage level shifter with single well voltage Grant 9,608,604 - Lu , et al. March 28, 2 | 2017-03-28 |
Integrated circuit design using DFM-enhanced architecture Grant 8,631,366 - Hou , et al. January 14, 2 | 2014-01-14 |
Place-and-route layout method with same footprint cells Grant 7,966,596 - Lu , et al. June 21, 2 | 2011-06-21 |
Integrated Circuit Design using DFM-Enhanced Architecture App 20100281446 - Hou; Yung-Chin ;   et al. | 2010-11-04 |
Layout architecture for improving circuit performance Grant 7,821,039 - Tien , et al. October 26, 2 | 2010-10-26 |
Standard cell without OD space effect in Y-direction Grant 7,808,051 - Hou , et al. October 5, 2 | 2010-10-05 |
Mother/daughter switch design with self power-up control Grant 7,793,130 - Yang , et al. September 7, 2 | 2010-09-07 |
Novel Layout Architecture For Performance Enhancement App 20100127333 - Hou; Yung-Chin ;   et al. | 2010-05-27 |
Standard Cell without OD Space Effect in Y-Direction App 20100078725 - Hou; Yung-Chin ;   et al. | 2010-04-01 |
Place-and-route Layout Method With Same Footprint Cells App 20100058267 - Lu; Lee-Chung ;   et al. | 2010-03-04 |
Layout Architecture for Improving Circuit Performance App 20090315079 - Tien; Li-Chun ;   et al. | 2009-12-24 |
Reverse-biased PN diode decoupling capacitor Grant 7,550,820 - Chen , et al. June 23, 2 | 2009-06-23 |
Mother/daughter switch design with self power-up control App 20080270813 - Yang; Shih-Hsien ;   et al. | 2008-10-30 |
Voltage level shifter with single well voltage App 20080143418 - Lu; Lee-Chung ;   et al. | 2008-06-19 |
Reverse-biased PN diode decoupling capacitor App 20080122036 - Chen; Hsien-Te ;   et al. | 2008-05-29 |
Variable layout design for multiple voltage applications Grant 6,903,389 - Tai , et al. June 7, 2 | 2005-06-07 |
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