loadpatents
name:-0.0062000751495361
name:-0.0045070648193359
name:-0.00036501884460449
Syoujiguchi; Takashi Patent Filings

Syoujiguchi; Takashi

Patent Applications and Registrations

Patent applications and USPTO patent grants for Syoujiguchi; Takashi.The latest application filed is for "metal foil provided with filler-containing resin layer and method for manufacturing metal foil provided with filler-containing resin layer".

Company Profile
0.5.5
  • Syoujiguchi; Takashi - Saitama JP
  • Syoujiguchi; Takashi - Ageo JP
  • Syoujiguchi, Takashi - Ageo-shi JP
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Metal foil provided with filler-containing resin layer and method for manufacturing metal foil provided with filler-containing resin layer
Grant 9,396,834 - Syoujiguchi July 19, 2
2016-07-19
Metal Foil Provided With Filler-containing Resin Layer And Method For Manufacturing Metal Foil Provided With Filler-containing Resin Layer
App 20130177739 - Syoujiguchi; Takashi
2013-07-11
Double-sided copper-clad laminate for forming capacitor layer and method for manufacture thereof, and printed wiring board obtained using the double-sided copper-clad laminate for forming capacitor layer
Grant 6,986,937 - Yamazaki , et al. January 17, 2
2006-01-17
Roll of laminate for capacitor layer for withstand voltage inspection and method of withstand voltage measurement using this roll of laminate for capacitor layer for withstand voltage inspection
Grant 6,903,916 - Yamazaki , et al. June 7, 2
2005-06-07
Double-sided copper-clad laminate for forming capacitor layer and method for manufacture thereof, and printed wiring board obtained using the double-sided copper-clad laminate for forming capacitor layer
App 20040161593 - Yamazaki, Kazuhiro ;   et al.
2004-08-19
Roll Of Laminate For Capacitor Layer For Withstand Voltage Inspection And Method Of Withstand Voltage Measurement Using This Roll Of Laminate For Capacitor Layer For Withstand Voltage Inspection
App 20040120098 - Yamazaki, Kazuhiro ;   et al.
2004-06-24
Cooper clad laminate with cooper-plated circuit layer, and method for manufacturing printed wiring board using the copper clad laminate with cooper-plated circuit layer
Grant 6,652,993 - Yamamoto , et al. November 25, 2
2003-11-25
Copper clad laminate with copper-plated circuit layer, and method for manufacturing printed wiring board using the copper clad laminate with copper-plated circuit layer
App 20020182434 - Yamamoto, Takuya ;   et al.
2002-12-05

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.

© 2024 USPTO.report | Privacy Policy | Resources | RSS Feed of Trademarks | Trademark Filings Twitter Feed