| Patent | Date |
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Method and apparatus for broadcasting scan patterns in a scan-based integrated circuit
Grant 9,696,377 - Wang , et al. July 4, 2 | 2017-07-04 |
Multiple-capture DFT method for detecting or locating crossing clock-domain faults during self-test or scan-test
Grant 9,678,156 - Wang , et al. June 13, 2 | 2017-06-13 |
Multiple-capture Dft Method For Detecting Or Locating Crossing Clock-domain Faults During Self-test Or Scan-test
App 20160131707 - Wang; Laung-Terng ; et al. | 2016-05-12 |
Multiple-capture DFT system for detecting or locating crossing clock-domain faults during scan-test
Grant 9,316,688 - Wang , et al. April 19, 2 | 2016-04-19 |
Multiple-capture DFT system for detecting or locating crossing clock-domain faults during scan-test
Grant 9,274,168 - Wang , et al. March 1, 2 | 2016-03-01 |
Multiple-capture Dft System For Detecting Or Locating Crossing Clock-domain Faults During Scan-test
App 20150338465 - WANG; Laung-Terng ; et al. | 2015-11-26 |
Method and Apparatus for Broadcasting Scan Patterns in a Scan-Based Integrated Circuit
App 20150338461 - Wang; Laung-Terng ; et al. | 2015-11-26 |
Multiple-capture Dft System For Detecting Or Locating Crossing Clock-domain Faults During Scan-test
App 20150316616 - WANG; LAUNG-TERNG ; et al. | 2015-11-05 |
Method and apparatus for broadcasting scan patterns in a scan-based integrated circuit
Grant 9,121,902 - Wang , et al. September 1, 2 | 2015-09-01 |
Method and apparatus for broadcasting scan patterns in a scan-based integrated circuit
Grant 9,110,139 - Wang , et al. August 18, 2 | 2015-08-18 |
Multiple-capture DFT system for detecting or locating crossing clock-domain faults during scan-test
Grant 9,091,730 - Wang , et al. July 28, 2 | 2015-07-28 |
Multiple-capture DFT system for detecting or locating crossing clock-domain faults during self-test or scan-test
Grant 9,057,763 - Wang , et al. June 16, 2 | 2015-06-16 |
Computer-aided design (CAD) multiple-capture DFT system for detecting or locating crossing clock-domain faults
Grant 9,046,572 - Wang , et al. June 2, 2 | 2015-06-02 |
Multiple-capture DFT system for detecting or locating crossing clock-domain faults during self-test or scan-test
Grant 9,026,875 - Wang , et al. May 5, 2 | 2015-05-05 |
Method and apparatus for hybrid ring generator design
Grant 8,949,299 - Wang , et al. February 3, 2 | 2015-02-03 |
Method and Apparatus for Broadcasting Scan Patterns in a Scan-Based Integrated Circuit
App 20140344636 - Wang; Laung-Terng ; et al. | 2014-11-20 |
Multiple-Capture DFT System for Detecting or Locating Crossing Clock-Domain Faults During Scan-Test
App 20140223251 - Wang; Laung-Terng ; et al. | 2014-08-07 |
Computer-aided design system to automate scan synthesis at register-transfer level
Grant 8,775,985 - Wang , et al. July 8, 2 | 2014-07-08 |
Multiple-capture DFT system for detecting or locating crossing clock-domain faults during self-test or scan-test
Grant 8,769,359 - Wang , et al. July 1, 2 | 2014-07-01 |
Method and Apparatus for Broadcasting Scan Patterns in a Scan-Based Integrated Circuit
App 20140149816 - Wang; Laung-Terng ; et al. | 2014-05-29 |
Method And Apparatus For Low-pin-count Scan Compression
App 20140143623 - TOUBA; Nur A. ; et al. | 2014-05-22 |
Multiple-Capture DFT System for Detecting or Locating Crossing Clock-Domain Faults During Self-Test or Scan-Test
App 20140082446 - Wang; Laung-Terng ; et al. | 2014-03-20 |
Computer-Aided Design (CAD) Multiple-Capture DFT System for Detecting or Locating Crossing Clock-Domain Faults
App 20140075257 - Wang; Laung-Terng ; et al. | 2014-03-13 |
Multiple-Capture DFT System for Detecting or Locating Crossing Clock-Domain Faults During Self-Test or Scan-Test
App 20140075256 - Wang; Laung-Terng ; et al. | 2014-03-13 |
Method and apparatus for broadcasting scan patterns in a scan-based integrated circuit
Grant 8,667,451 - Wang March 4, 2 | 2014-03-04 |
X-Tracer: A Reconfigurable X-Tolerance Trace Compressor for Silicon Debug
App 20130326281 - Xu; Qiang ; et al. | 2013-12-05 |
Computer-aided Design System To Automate Scan Synthesis At Register-transfer Level
App 20130305200 - WANG; Laung-Terng ; et al. | 2013-11-14 |
Multiple-Capture DFT System for Detecting or Locating Crossing Clock-Domain Faults During Self-Test or Scan-Test
App 20130268818 - Wang; Laung-Terng ; et al. | 2013-10-10 |
Computer-aided design system to automate scan synthesis at register-transfer level
Grant 8,543,950 - Wang , et al. September 24, 2 | 2013-09-24 |
Method and apparatus for testing 3D integrated circuits
Grant 8,522,096 - Wang , et al. August 27, 2 | 2013-08-27 |
Multiple-capture DFT system to reduce peak capture power during self-test or scan test
Grant 8,458,544 - Wang , et al. June 4, 2 | 2013-06-04 |
Method And Apparatus For Hybrid Ring Generator Design
App 20130036146 - Wang; Laung-Terng ; et al. | 2013-02-07 |
Method And Apparatus For Broadcasting Scan Patterns In A Scan-based Integrated Circuit
App 20120331361 - WANG; Laung-Terng (L.-T.) | 2012-12-27 |
Method and apparatus for low-pin-count scan compression
Grant 8,335,954 - Touba , et al. December 18, 2 | 2012-12-18 |
Method And Apparatus For Low-pin-count Scan Compression
App 20120266036 - TOUBA; Nur A. ; et al. | 2012-10-18 |
Computer-aided Design System To Automate Scan Synthesis At Register-transfer Level
App 20120246604 - WANG; Laung-Terng (L. -T.) ; et al. | 2012-09-27 |
Method and apparatus for low-pin-count scan compression
Grant 8,230,282 - Touba , et al. July 24, 2 | 2012-07-24 |
Computer-aided design system to automate scan synthesis at register-transfer level
Grant 8,219,945 - Wang , et al. July 10, 2 | 2012-07-10 |
Multiple-capture Dft System To Reduce Peak Capture Power During Self-test Or Scan Test
App 20120166903 - WANG; Laung-Terng ; et al. | 2012-06-28 |
Method And Apparatus For Testing 3d Integrated Circuits
App 20120110402 - Wang; Laung-Terng ; et al. | 2012-05-03 |
Multiple-capture DFT system to reduce peak capture power during self-test or scan test
Grant 8,091,002 - Wang , et al. January 3, 2 | 2012-01-03 |
Computer-aided Design System To Automate Scan Synthesis At Register-transfer Level
App 20110197171 - WANG; Laung-Terng (L.-T.) ; et al. | 2011-08-11 |
Method and apparatus for low-pin-count scan compression
Grant 7,996,741 - Touba , et al. August 9, 2 | 2011-08-09 |
Method and apparatus for pipelined scan compression
Grant 7,945,833 - Wang , et al. May 17, 2 | 2011-05-17 |
Method and apparatus for unifying self-test with scan-test during prototype debug and production test
Grant 7,945,830 - Wang , et al. May 17, 2 | 2011-05-17 |
X-canceling multiple-input signature register (MISR) for compacting output responses with unknowns
Grant 7,925,947 - Touba , et al. April 12, 2 | 2011-04-12 |
Computer-aided design system to automate scan synthesis at register-transfer level
Grant 7,904,857 - Wang , et al. March 8, 2 | 2011-03-08 |
Multiple-capture DFT system for scan-based integrated circuits
Grant 7,904,773 - Wang , et al. March 8, 2 | 2011-03-08 |
Multiple-capture Dft System To Reduce Peak Capture Power During Self-test Or Scan Test
App 20100287430 - WANG; Laung-Terng ; et al. | 2010-11-11 |
Apparatus for redundancy reconfiguration of faculty memories
Grant 7,783,940 - Yu , et al. August 24, 2 | 2010-08-24 |
Compacting test responses using X-driven compactor
Grant 7,779,322 - Wang , et al. August 17, 2 | 2010-08-17 |
Multiple-capture DFT system for detecting or locating crossing clock-domain faults during self-test or scan-test
Grant 7,779,323 - Wang , et al. August 17, 2 | 2010-08-17 |
Method and apparatus for unifying self-test with scan-test during prototype debug and production test
Grant 7,747,920 - Wang , et al. June 29, 2 | 2010-06-29 |
Mask network design for scan-based integrated circuits
Grant 7,735,049 - Wang , et al. June 8, 2 | 2010-06-08 |
Method and apparatus for broadcasting scan patterns in a scan-based integrated circuit
Grant 7,721,173 - Wang , et al. May 18, 2 | 2010-05-18 |
Method and apparatus for broadcasting test patterns in a scan-based integrated circuit
Grant 7,721,172 - Wang , et al. May 18, 2 | 2010-05-18 |
Method And Apparatus For Broadcasting Scan Patterns In A Scan-based Integrated Circuit
App 20090235132 - Wang; Laung-Terng ; et al. | 2009-09-17 |
Method and apparatus for pipelined scan compression
Grant 7,590,905 - Abdel-Hafez , et al. September 15, 2 | 2009-09-15 |
Method and apparatus for broadcasting scan patterns in a scan-based integrated circuit
Grant 7,552,373 - Wang , et al. June 23, 2 | 2009-06-23 |
Multiple-capture DFT system for detecting or locating crossing clock-domain faults during self-test or scan-test
App 20090132880 - Wang; Laung-Terng (L.- T.) ; et al. | 2009-05-21 |
Method and apparatus for shifting at-speed scan patterns in a scan-based integrated circuit
Grant 7,512,851 - Wang , et al. March 31, 2 | 2009-03-31 |
Multiple-Capture DFT system for scan-based integrated circuits
App 20090070646 - Wang; Laung-Terng (L.T.) ; et al. | 2009-03-12 |
Method and apparatus for unifying self-test with scan-test during prototype debug and production test
App 20090037786 - Wang; Laung-Terng ; et al. | 2009-02-05 |
Multiple-capture DFT system for scan-based integrated circuits
Grant 7,451,371 - Wang , et al. November 11, 2 | 2008-11-11 |
Method and apparatus for broadcasting scan patterns in a random access based integrated circuit
App 20080276143 - Wang; Laung-Terng (L.-T.) ; et al. | 2008-11-06 |
Method and apparatus for broadcasting scan patterns in a scan-based integrated circuit
App 20080276141 - Wang; Laung-Terng(L.-T.) ; et al. | 2008-11-06 |
Method and apparatus for unifying self-test with scan-test during prototype debug and production test
Grant 7,444,567 - Wang , et al. October 28, 2 | 2008-10-28 |
Computer-aided design (CAD) multiple-capture DFT system for detecting or locating crossing clock-domain faults
Grant 7,434,126 - Wang , et al. October 7, 2 | 2008-10-07 |
Method and apparatus for broadcasting test patterns in a scan based integrated circuit
Grant 7,412,637 - Wang , et al. August 12, 2 | 2008-08-12 |
Method and apparatus for broadcasting scan patterns in a scan-based integrated circuit
Grant 7,412,672 - Wang , et al. August 12, 2 | 2008-08-12 |
Computer-aided design system to automate scan synthesis at register-transfer level
App 20080134107 - Wang; Laung-Terng ; et al. | 2008-06-05 |
Computer-aided design system to automate scan synthesis at register-transfer level
Grant 7,331,032 - Wang , et al. February 12, 2 | 2008-02-12 |
Computer-aided design (CAD) multiple-capture DFT system for detecting or locating crossing clock-domain faults
App 20070255988 - Wang; Laung-Terng ; et al. | 2007-11-01 |
Method and apparatus for diagnosing failures in an integrated circuit using design-for-debug (DFD) techniques
Grant 7,284,175 - Wang , et al. October 16, 2 | 2007-10-16 |
Multiple-capture DFT system for detecting or locating crossing clock-domain faults during scan-test
Grant 7,260,756 - Wang , et al. August 21, 2 | 2007-08-21 |
Method and apparatus for diagnosing failures in an integrated circuit using design-for-debug (DFD) techniques
App 20070168803 - Wang; Laung-Terng ; et al. | 2007-07-19 |
Method and apparatus for multi-level scan compression
Grant 7,231,570 - Wang , et al. June 12, 2 | 2007-06-12 |
IEEE Std. 1149.4 compatible analog BIST methodology
Grant 7,228,479 - Su , et al. June 5, 2 | 2007-06-05 |
Method for performing ATPG and fault simulation in a scan-based integrated circuit
Grant 7,210,082 - Abdel-Hafez , et al. April 24, 2 | 2007-04-24 |
Method and apparatus for diagnosing failures in an integrated circuit using design-for-debug (DFD) techniques
Grant 7,191,373 - Wang , et al. March 13, 2 | 2007-03-13 |
Smart capture for ATPG (automatic test pattern generation) and fault simulation of scan-based integrated circuits
Grant 7,124,342 - Wang , et al. October 17, 2 | 2006-10-17 |
Mask network design for scan-based integrated circuits
App 20060156122 - Wang; Laung-Terng ; et al. | 2006-07-13 |
Method and apparatus for debug, diagnosis, and yield improvement of scan-based integrated circuits
Grant 7,058,869 - Abdel-Hafez , et al. June 6, 2 | 2006-06-06 |
Mask network design for scan-based integrated circuits
Grant 7,032,148 - Wang , et al. April 18, 2 | 2006-04-18 |
Multiple-capture DFT system for detecting or locating crossing clock-domain faults during self-test or scan-test
Grant 7,007,213 - Wang , et al. February 28, 2 | 2006-02-28 |
Multiple-capture DFT system for scan-based integrated circuits
App 20050235186 - Wang, Laung-Terng ; et al. | 2005-10-20 |
Computer-aided design system to automate scan synthesis at register-transfer level
Grant 6,957,403 - Wang , et al. October 18, 2 | 2005-10-18 |
Computer-aided design system to automate scan synthesis at register-transfer level
App 20050229123 - Wang, Laung-Terng ; et al. | 2005-10-13 |
Multiple-capture DFT system for scan-based integrated circuits
Grant 6,954,887 - Wang , et al. October 11, 2 | 2005-10-11 |
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