Sung; Nai-Yin
Patent Applications and Registrations
Patent applications and USPTO patent grants for Sung; Nai-Yin.The latest application filed is for "method to design and verify an integrated circuit device with multiple power domains".
- Sung; Nai-Yin - Hsin Chu TW
- Sung, Nai-Yin - HsinChu TW
- Sung, Nai-Yin - Hsinchu City TW
| Patent | Date |
|---|---|
| Method to design and verify an integrated circuit device with multiple power domains Grant 7,103,862 - Sung , et al. September 5, 2 | 2006-09-05 |
| Method to design and verify an integrated circuit device with multiple power domains App 20050216872 - Sung, Nai-Yin ; et al. | 2005-09-29 |
| Method to verify the performance of BIST circuitry for testing embedded memory Grant 6,941,499 - Sung , et al. September 6, 2 | 2005-09-06 |
| Method for providing VITAL model of embedded memory with delay back annotation App 20050071144 - Sung, Nai-Yin ; et al. | 2005-03-31 |
| Power supply layout for an integrated circuit App 20050071798 - Chung, Ching-Yao ; et al. | 2005-03-31 |
| System and measuring access time of embedded memories Grant 6,424,583 - Sung , et al. July 23, 2 | 2002-07-23 |
| System For Measuring Access Time Of Embedded Memories App 20020075740 - Sung, Nai-Yin ; et al. | 2002-06-20 |
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