loadpatents
name:-0.0099668502807617
name:-0.042523145675659
name:-0.0047078132629395
Sundararajan; Prasanna Patent Filings

Sundararajan; Prasanna

Patent Applications and Registrations

Patent applications and USPTO patent grants for Sundararajan; Prasanna.The latest application filed is for "persistence of write requests in a database proxy".

Company Profile
4.43.8
  • Sundararajan; Prasanna - Palo Alto CA
  • Sundararajan; Prasanna - Mountain View CA
  • Sundararajan; Prasanna - San Jose CA
  • Sundararajan; Prasanna - Los Gatos CA
  • Sundararajan; Prasanna - Campbell CA
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Persistence of write requests in a database proxy
Grant 11,429,595 - Vishwakarma , et al. August 30, 2
2022-08-30
System and method for a database proxy
Grant 11,349,922 - Kulkarni , et al. May 31, 2
2022-05-31
Techniques for accelerating compaction
Grant 11,256,515 - Kulkarni , et al. February 22, 2
2022-02-22
Persistence Of Write Requests In A Database Proxy
App 20210311930 - VISHWAKARMA; Amarnath ;   et al.
2021-10-07
System and method to accelerate compaction
Grant 11,126,600 - Kulkarni , et al. September 21, 2
2021-09-21
System and method for a database proxy
Grant 11,044,314 - Kulkarni , et al. June 22, 2
2021-06-22
Systems and methods for congestion control in a network
Grant 10,931,587 - Kulkarni , et al. February 23, 2
2021-02-23
Techniques For Accelerating Compaction
App 20200379775 - KULKARNI; Chidamber ;   et al.
2020-12-03
System And Method For A Database Proxy
App 20200059515 - KULKARNI; Chidamber ;   et al.
2020-02-20
System And Method For A Database Proxy
App 20190273782 - KULKARNI; Chidamber ;   et al.
2019-09-05
Systems And Methods For Congestion Control In A Network
App 20190182170 - KULKARNI; Chidamber ;   et al.
2019-06-13
System and method for a database proxy
Grant 10,237,350 - Kulkarni , et al.
2019-03-19
Stream memory management unit (SMMU)
Grant 10,049,035 - Kulkarni , et al. August 14, 2
2018-08-14
System And Method For A Database Proxy
App 20170295236 - KULKARNI; CHIDAMBER ;   et al.
2017-10-12
Compiler directed cache coherence for many caches generated from high-level language source code
Grant 9,378,003 - Sundararajan , et al. June 28, 2
2016-06-28
Heterogeneous memory system
Grant 9,286,221 - Sundararajan , et al. March 15, 2
2016-03-15
Heterogeneous memory system
Grant 9,262,325 - Sundararajan , et al. February 16, 2
2016-02-16
Heterogeneous memory system
Grant 9,043,557 - Sundararajan , et al. May 26, 2
2015-05-26
Generation of cache architecture from a high-level language description
Grant 8,473,904 - Sundararajan , et al. June 25, 2
2013-06-25
Synchronization of parallel memory accesses in a dataflow circuit
Grant 8,473,880 - Bennett , et al. June 25, 2
2013-06-25
Optimization of cache architecture generated from a high-level language description
Grant 8,468,510 - Sundararajan , et al. June 18, 2
2013-06-18
Methods for identifying gating opportunities from a high-level language program and generating a hardware definition
Grant 8,443,344 - Sundararajan , et al. May 14, 2
2013-05-14
Method of routing a design to increase the quality of the design
Grant 8,104,011 - Sundararajan , et al. January 24, 2
2012-01-24
Secure exchange of IP cores
Grant 7,971,072 - Donlin , et al. June 28, 2
2011-06-28
Methods for automatically generating fault mitigation strategies for electronic system designs
Grant 7,930,662 - Sundararajan , et al. April 19, 2
2011-04-19
Single event upset mitigation
Grant 7,852,107 - Sundararajan December 14, 2
2010-12-14
Profiling a hardware system generated by compiling a high level language onto a programmable logic device
Grant 7,813,912 - Sundararajan October 12, 2
2010-10-12
Method and system for secure exchange of IP cores
Grant 7,788,502 - Donlin , et al. August 31, 2
2010-08-31
Programmable logic device (PLD) with memory refresh based on single event upset (SEU) occurrence to maintain soft error immunity
Grant 7,764,081 - Tuan , et al. July 27, 2
2010-07-27
Bootable integrated circuit device for readback encoding of configuration data
Grant 7,689,726 - Sundararajan , et al. March 30, 2
2010-03-30
Method of refreshing configuration data in an integrated circuit
Grant 7,539,914 - Sundararajan , et al. May 26, 2
2009-05-26
Concealed, non-intrusive watermarks for configuration bitstreams
Grant 7,519,823 - Schumacher , et al. April 14, 2
2009-04-14
Method and system for identifying essential configuration bits
Grant 7,406,673 - Patterson , et al. July 29, 2
2008-07-29
Using redundant routing to reduce susceptibility to single event upsets in PLD designs
Grant 7,386,826 - Keller , et al. June 10, 2
2008-06-10
Method of routing a design to increase the quality of the design
Grant 7,367,007 - Sundararajan , et al. April 29, 2
2008-04-29
Method and system for generating a bitstream view of a design
Grant 7,343,578 - Patterson , et al. March 11, 2
2008-03-11
Bootable programmable logic device for internal decoding of encoded configuration data
Grant 7,328,335 - Sundararajan , et al. February 5, 2
2008-02-05
Methods of estimating susceptibility to single event upsets for a design implemented in an FPGA
Grant 7,249,010 - Sundararajan , et al. July 24, 2
2007-07-24
Reconfiguration of a programmable logic device using internal control
Grant 7,227,378 - Blodget , et al. June 5, 2
2007-06-05
Methods of reducing the susceptibility of PLD designs to single event upsets
Grant 7,111,215 - Keller , et al. September 19, 2
2006-09-19
Reconfiguration of a programmable logic device using internal control
App 20050193358 - Blodget, Brandon J. ;   et al.
2005-09-01
Reconfiguration of a programmable logic device using internal control
Grant 6,920,627 - Blodget , et al. July 19, 2
2005-07-19
Reconfiguration of a programmable logic device using internal control
App 20040117755 - Blodget, Brandon J. ;   et al.
2004-06-17
Run-time reconfigurable testing of programmable logic devices
Grant 6,668,237 - Guccione , et al. December 23, 2
2003-12-23
Adaptable configuration interface for a programmable logic device
Grant 6,665,766 - Guccione , et al. December 16, 2
2003-12-16
Method and apparatus for tolerating defects in a programmable logic device using runtime parameterizable cores
Grant 6,530,071 - Guccione , et al. March 4, 2
2003-03-04

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