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name:-0.020895957946777
name:-0.028412818908691
name:-0.0046951770782471
Sun; Yuan-Chen Patent Filings

Sun; Yuan-Chen

Patent Applications and Registrations

Patent applications and USPTO patent grants for Sun; Yuan-Chen.The latest application filed is for "method of dopant deactivation underneath gate".

Company Profile
4.25.17
  • Sun; Yuan-Chen - Hsinchu TW
  • Sun; Yuan-Chen - Hsin-Chu TW
  • Sun; Yuan-Chen - Taipei TW
  • Sun; Yuan-Chen - Katonah NY
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Field-effect transistors having transition metal dichalcogenide channels and methods of manufacture
Grant 11,410,996 - Yeo , et al. August 9, 2
2022-08-09
Field-effect transistors having transition metal dichalcogenide channels and methods of manufacture
Grant 11,164,864 - Yeo , et al. November 2, 2
2021-11-02
Method Of Dopant Deactivation Underneath Gate
App 20210234003 - SATHAIYA; Dhanyakumar Mahaveer ;   et al.
2021-07-29
Local Epitaxy Nanofilms for Nanowire Stack GAA Device
App 20210226005 - Yeh; Ling-Yen ;   et al.
2021-07-22
Conformal source and drain contacts for multi-gate field effect transistors
Grant 11,063,128 - Yeo , et al. July 13, 2
2021-07-13
Local epitaxy nanofilms for nanowire stack GAA device
Grant 11,043,556 - Yeh , et al. June 22, 2
2021-06-22
MOSFET with selective dopant deactivation underneath gate
Grant 10,985,246 - Sathaiya , et al. April 20, 2
2021-04-20
Field-Effect Transistors Having Transition Metal Dichalcogenide Channels and Methods of Manufacture
App 20200006337 - Yeo; Yee-Chia ;   et al.
2020-01-02
Local Epitaxy Nanofilms For Nanowire Stack Gaa Device
App 20190393305 - Yeh; Ling-Yen ;   et al.
2019-12-26
Mosfet With Selective Dopant Deactivation Underneath Gate
App 20190165104 - SATHAIYA; Dhanyakumar Mahaveer ;   et al.
2019-05-30
Conformal Source and Drain Contacts for Multi-Gate Field Effect Transistors
App 20190123157 - Yeo; Yee-Chia ;   et al.
2019-04-25
Field-effect transistors having transition metal dichalcogenide channels and methods of manufacture
Grant 10,269,791 - Yeo , et al.
2019-04-23
Conformal source and drain contacts for multi-gate field effect transistors
Grant 10,164,033 - Yeo , et al. Dec
2018-12-25
MOSFET with selective dopant deactivation underneath gate
Grant 10,157,985 - Sathaiya , et al. Dec
2018-12-18
Field-Effect Transistors Having Transition Metal Dichalcogenide Channels and Methods of Manufacture
App 20180350806 - Yeo; Yee-Chia ;   et al.
2018-12-06
Conformal Source and Drain Contacts for Multi-Gate Field Effect Transistors
App 20170194442 - Yeo; Yee-Chia ;   et al.
2017-07-06
Conformal source and drain contacts for multi-gate field effect transistors
Grant 9,614,086 - Yeo , et al. April 4, 2
2017-04-04
Field-Effect Transistors Having Transition Metal Dichalcogenide Channels and Methods of Manufacture
App 20160276343 - Yeo; Yee-Chia ;   et al.
2016-09-22
Mosfet With Selective Dopant Deactivation Underneath Gate
App 20160005817 - SATHAIYA; Dhanyakumar Mahaveer ;   et al.
2016-01-07
MOSFET with selective dopant deactivation underneath gate
Grant 9,153,662 - Sathaiya , et al. October 6, 2
2015-10-06
Method and system for bonding 3D semiconductor device
Grant 9,123,553 - Liu , et al. September 1, 2
2015-09-01
Mosfet With Slective Dopant Deactivation Underneath Gate
App 20130256796 - SATHAIYA; Dhanyakumar Mahaveer ;   et al.
2013-10-03
Method and System for Bonding 3D Semiconductor Device
App 20120028441 - Liu; Chung-Shi ;   et al.
2012-02-02
Method and system for bonding 3D semiconductor devices
Grant 8,048,717 - Liu , et al. November 1, 2
2011-11-01
MOS devices with source/drain regions having stressed regions and non-stressed regions
Grant 7,612,364 - Chuang , et al. November 3, 2
2009-11-03
Method and system for bonding 3D semiconductor devices
App 20080268573 - Liu; Chung-Shi ;   et al.
2008-10-30
Formation process of interconnect structures with air-gaps and sidewall spacers
App 20080185722 - Liu; Chung-Shi ;   et al.
2008-08-07
Structure and methods for forming SiGe stressors
App 20080054250 - Chuang; Harry ;   et al.
2008-03-06
Methods for controlling thickness uniformity of SiGe regions
App 20080042123 - Thei; Kong-Beng ;   et al.
2008-02-21
Superconductor gate semiconductor channel field effect transistor
Grant 6,774,463 - Chaudhari , et al. August 10, 2
2004-08-10
Method to reduce a reverse narrow channel effect for MOSFET devices
Grant 6,245,639 - Tsai , et al. June 12, 2
2001-06-12
Borderless contact
Grant 6,083,824 - Tsai , et al. July 4, 2
2000-07-04
Dual damascene interconnect process with borderless contact
Grant 6,020,255 - Tsai , et al. February 1, 2
2000-02-01
Multilevel electronic structures containing copper layer and copper-semiconductor layers
Grant 5,801,444 - Aboelfotoh , et al. September 1, 1
1998-09-01
Vertical double-gate field effect transistor
Grant 5,780,327 - Chu , et al. July 14, 1
1998-07-14
Vertical double-gate field effect transistor
Grant 5,689,127 - Chu , et al. November 18, 1
1997-11-18
SiGe thin film or SOI MOSFET and method for making the same
Grant 5,461,250 - Burghartz , et al. October 24, 1
1995-10-24
Low capacitance bipolar junction transistor and fabrication process therfor
Grant 5,117,271 - Comfort , et al. May 26, 1
1992-05-26
Process for fabricating low capacitance bipolar junction transistor
Grant 5,106,767 - Comfort , et al. April 21, 1
1992-04-21

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